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TPS5110 Fiches technique(PDF) 6 Page - Texas Instruments |
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TPS5110 Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 43 page TPS5110 SLVS025B − APRIL 2002 − REVISED JULY 2004 6 www.ti.com Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION NAME NO. I/O DESCRIPTION CT 5 I/O External capacitor from CT to GND adjusts frequency of the triangle oscillator. FB 2 O Feedback output of error amplifier FLT 10 I/O Fault latch timer pin. An external capacitor is connected between FLT and GND to set the FLT enable time up. GND 6 − Signal GND INV 1 I Inverting input of the SBRC error amplifier, skip comparator, OVP/UVP comparators and POWERGOOD comparator INV_LDO 12 I Inverting input of the LDO regulator, OVP/UVP comparators and POWERGOOD comparator LDO_CUR 15 I Current sense input of the LDO regulator. LDO_GATE 14 O Gate control output of an external MOSFET for LDO LDO_OUT 13 I/O LDO regulator’s output connection. If output voltage causes an over shoot at output current changes high to low quickly, it pulls out electrical charge from this pin. LDO_IN 16 I Input of LDO regulator and current sense input of LDO regulator LH 24 I/O Bootstrap capacitor connection for high-side gate driver LL 22 I/O High side gate driving return. Connect this pin to the junction of the high side and low side MOSFET(s) for floating drive configuration. This pin also is an input terminal for current comparator. OUT_d 21 O Gate drive output for low-side MOSFET(s) OUT_u 23 O Gate drive output for high-side MOSFET(s). OUTGND 20 − Ground for FET drivers. It is connected to the current limiting comparator’s negative input. POWERGOOD 11 O Power good open-drain output. PG comparators monitor both SBRC’s and LDO’s over voltage and under voltage. The threshold is ±7%. When either output is beyond this condition, POWERGOOD output goes low. When STBY or STBY_LDO goes high, the POWERGOOD pin’s output starts with high. POWER- GOOD also monitors REG5V_IN’s UVLO output. PWM_SEL 4 I PWM or auto PWM/SKIP modes select. H: auto PWM/SKIP L: PWM fixed REF 7 O 0.85-V reference voltage output. This 0.85-V reference voltage is used for setting the output voltage and the voltage protections. This reference voltage is regulated from REG5V_IN power supply. REG5V_IN 17 I External 5-V input. This input is a supply voltage for internal circuits. SOFTSTART 3 I/O External capacitor between SOFTSTART and GND sets SBRC soft−start time. STBY 8 I Standby control input for SBRC. SBRC can be switched into standby mode by grounding the STBY pin. STBY_LDO 9 I Standby control input for LDO regulator. LDO regulator can be switched into standby mode by grounding the STBY_LDO pin. TRIP 19 I External resistor connection for SBRC’s output current protection control. VIN_SENSE 18 I SBRC supply voltage monitor. Input range is 4.5 V to 28 V. This pin is for reference of current limit. |
Numéro de pièce similaire - TPS5110 |
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Description similaire - TPS5110 |
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