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TPS3779BDBVR Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce TPS3779BDBVR
Description  Dual-Channel, Low-Power, High-Accuracy Voltage Detectors
Download  28 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS3779BDBVR Fiches technique(HTML) 3 Page - Texas Instruments

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SENSE1
GND
SENSE2
VDD
OUT1
OUT2
1
2
3
6
5
4
SENSE1
GND
SENSE2
VDD
OUT1
OUT2
1
2
3
6
5
4
TPS3779, TPS3780
www.ti.com
SBVS250 – APRIL 2015
5 Device Comparison Table
PRODUCT
HYSTERESIS (%)
OUTPUT
TPS3779A
0.5
Push-pull
TPS3779B
5
Push-pull
TPS3779C
10
Push-pull
TPS3779D
1
Push-pull
TPS3780A
0.5
Open-drain
TPS3780B
5
Open-drain
TPS3780C
10
Open-drain
TPS3780D
1
Open-drain
6 Pin Configuration and Functions
DRY Package
DBV Package
1.45-mm × 1-mm µSON
SOT23-6
(Top View)
(Top View)
Pin Functions
PIN
NO.
I/O
DESCRIPTION
NAME
DRY
DBV
GND
2
5
Ground
OUT1 is the output for SENSE1. OUT1 is asserted (driven low) when the
voltage at SENSE1 falls below VIT–. OUT1 is deasserted (goes high) after
SENSE1 rises higher than VIT+. OUT1 is a push-pull output for the TPS3779
OUT1
5
2
O
and an open-drain output for the TPS3780. The open-drain device
(TPS3780) can be pulled up to 6.5 V independent of VDD; a pull-up resistor
is required for this device.
OUT2 is the output for SENSE2. OUT2 is asserted (driven low) when the
voltage at SENSE2 falls below VIT–. OUT2 is deasserted (goes high) after
SENSE2 rises higher than VIT+. OUT2 is a push-pull output for the TPS3779
OUT2
4
3
O
and an open-drain output for the TPS3780. The open-drain device
(TPS3780) can be pulled up to 6.5 V independent of VDD; a pull-up resistor
is required for this device.
This pin is connected to the voltage to be monitored with the use of an
SENSE1
1
6
I
external resistor divider. When the voltage at this pin drops below the
threshold voltage (VIT–), OUT1 is asserted.
This pin is connected to the voltage to be monitored with the use of an
SENSE2
3
4
I
external resistor divider. When the voltage at this pin drops below the
threshold voltage (VIT–), OUT2 is asserted.
Supply voltage input. Connect a 1.5-V to 6.5-V supply to VDD in order to
VDD
6
1
I
power the device. Good analog design practice is to place a 0.1-µF ceramic
capacitor close to this pin (required for VDD < 1.5 V).
Copyright © 2015, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Links: TPS3779 TPS3780


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