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TPS3702CX10DDCR Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS3702CX10DDCR Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 28 page TPS3702 www.ti.com SBVS251 – JANUARY 2015 6.5 Electrical Characteristics At 2 V ≤ VDD ≤ 18 V, 1 V ≤ VSENSE ≤ 5 V, and over the operating free-air temperature range of –40°C to 125°C, unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD Supply voltage range 2 18 V VIT+(OV) Positive-going threshold accuracy VSET ≤ VIL(SET), VSET ≥ VIH(SET) –0.9% ±0.25% 0.9% VIT–(UV) Negative-going threshold accuracy VSET ≤ VIL(SET), VSET ≥ VIH(SET) –0.9% ±0.25% 0.9% VHYS Hysteresis voltage(1) TPS3702xXx 0.3% 0.55% 0.8% V(POR) Power-on reset voltage(2) VOL(max) = 0.25 V, IOUT = 15 µA 0.8 V VDD = 2 V 6.0 10 µA IDD Supply current VDD ≥ 5 V 7.0 12 µA ISENSE Input current, SENSE pin VSENSE = 5 V 1 1.5 µA ISET Internal pull-up current, SET pin VDD = 18 V, SET pin = GND 600 nA VDD = 1.3 V, IOUT = 0.4 mA 250 mV VOL Low-level output voltage VDD = 2 V, IOUT = 3 mA 250 mV VDD = 5 V, IOUT = 5 mA 250 mV VIL(set) Low-level SET pin input voltage 250 mV VIH(set) High-level SET pin input voltage 750 mV ID(leak) VPU = VDD 300 nA Open-drain output leakage current ILKG(od) VDD = 2 V, VPU = 18 V 300 nA UVLO Undervoltage lockout(3) VDD falling 1.3 1.7 V (1) Hysteresis is 0.55% of the nominal trip point. (2) The outputs are undetermined below V(POR). (3) When VDD falls below UVLO, UV is driven low and OV goes to high impedance. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS3702 |
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