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TPS3895PDRYT Fiches technique(PDF) 4 Page - Texas Instruments

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No de pièce TPS3895PDRYT
Description  Single-Channel, Adjustable Voltage Monitor in Ultra-Small Package
Download  31 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS3895PDRYT Fiches technique(HTML) 4 Page - Texas Instruments

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ENABLE
GND
SENSE
VCC
CT
SENSE_OUT
1
2
3
6
5
4
ENABLE
GND
SENSE
VCC
CT
SENSE_OUT
1
2
3
6
5
4
TPS389
SBVS172B – JULY 2011 – REVISED APRIL 2015
www.ti.com
6 Pin Configuration and Functions
DRY Package: TPS3895, TPS3897
6-Pin USON
Top View
DRY Package: TPS3896, TPS3898
6-Pin USON
Top View
Pin Functions
PIN
USON
I/O
DESCRIPTION
NAME
TPS3895/
TPS3896/
TPS3897
TPS3898
Capacitor-adjustable delay. The CT pin offers a user-adjustable delay time. Connecting
this pin to a ground referenced capacitor sets the delay time for SENSE rising above
CT
5
5
I
0.5 V to SENSE_OUT asserting (or ENABLE asserting to SENSE_OUT asserting for A
version devices).
tpd(r) (s) = [CCT (µF) × 4] + 40 µs
Active high input. Driving ENABLE low immediately makes SENSE_OUT go low,
independent of V(SENSE). With V(SENSE) already above VIT+, drive ENABLE high to
ENABLE
1
I
make SENSE_OUT go high after the capacitor-adjustable delay time (A version) or 0.2
µs (P version).
Active low input. Driving ENABLE high immediately makes SENSE_OUT go high,
independent of V(SENSE). With V(SENSE) already above VIT+, drive ENABLE low to make
ENABLE
1
I
SENSE_OUT go low after the capacitor-adjustable delay time (A version) or 0.2 µs (P
version).
GND
2
2
Ground
This pin is connected to the voltage that is monitored with the use of an external
resistor. The output asserts after the capacitor-adjustable delay time when V(SENSE)
SENSE
3
3
I
rises above 0.5 V and ENABLE is asserted. The output deasserts after a minimal
propagation delay (16 µs) when V(SENSE) falls below VIT+ – Vhys.
SENSE_OUT is an open-drain and push-pull output that is immediately driven low after
V(SENSE) falls below (VIT+ – Vhys) or the ENABLE input is low. SENSE_OUT goes high
SENSE_OUT
4
O
after the capacitor-adjustable delay time when V(SENSE) is greater than VIT+ and the
ENABLE pin is high. Open-drain devices (TPS3897/8) can be pulled up to 18 V
independent of VCC; pullup resistors are required for these devices.
SENSE_OUT is an open-drain and push-pull output that is immediately driven high
after V(SENSE) falls below (VIT+ – Vhys) or the ENABLE input is high. SENSE_OUT goes
SENSE_OUT
4
O
low after the capacitor-adjustable delay time when V(SENSE) is greater than VIT+ and the
ENABLE pin is low. Open-drain devices (TPS3897/8) can be pulled up to 18 V
independent of VCC; pullup resistors are required for these devices.
Supply voltage input. Connect a 1.7-V to 6.5-V supply to VCC to power the device. It is
VCC
6
6
I
good analog design practice to place a 0.1-µF ceramic capacitor close to this pin.
4
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Copyright © 2011–2015, Texas Instruments Incorporated
Product Folder Links: TPS389


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