TPS2044, TPS2054

QUAD POWER-DISTRIBUTION SWITCHES

SLVS174B – JULY 1998 – REVISED FEBRUARY 1999

6

POST OFFICE BOX 655303

power switch

PARAMETER

TEST CONDITIONS†

TPS2044

TPS2054

UNIT

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VI(INx) = 5 V,

IO = 0.5 A

TJ = 25°C,

80

95

80

95

Static drain-source on-state

resistance, 5-V operation

VI(INx) = 5 V,

IO = 0.5 A

TJ = 85°C,

90

120

90

120

rDS( )

VI(INx) = 5 V,

IO = 0.5 A

TJ = 125°C,

100

135

100

135

m

Ω

rDS(on)

VI(INx) = 3.3 V,

IO = 0.5 A

TJ = 25°C,

85

105

85

105

Static drain-source on-state

resistance, 3.3-V operation

VI(INx) = 3.3 V,

IO = 0.5 A

TJ = 85°C,

100

135

100

135

VI(INx) = 3.3 V,

IO = 0.5 A

TJ = 125°C,

115

150

115

150

t

Rise time output

VI(INx) = 5.5 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

2.5

2.5

ms

tr

Rise time, output

VI(INx) = 2.7 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

3

3

ms

tf

Fall time output

VI(INx) = 5.5 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

4.4

4.4

ms

tf

Fall time, output

VI(INx) = 2.7 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

2.5

2.5

ms

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

enable input ENx or ENx

PARAMETER

TEST CONDITIONS

TPS2044

TPS2054

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VIH

High-level input voltage

2.7 V

≤ VI(INx) ≤ 5.5 V

2

2

V

VIL

Low level input voltage

4.5 V

≤ VI(INx) ≤ 5.5 V

0.8

0.8

V

VIL

Low-level input voltage

2.7 V

≤ VI(INx) ≤ 4.5 V

0.4

0.4

II

Input current

TPS2044

VI(ENx) = 0 V or VI(ENx) = VI(IN)

–0.5

0.5

µA

II

Input current

TPS2054

VI(ENx) = VI(INx) or VI(ENx) = 0 V

–0.5

0.5

µA

ton

Turnon time

CL = 100 µF, RL=10 Ω

20

20

ms

toff

Turnoff time

CL = 100 µF, RL=10 Ω

40

40

current limit

PARAMETER

TEST CONDITIONS†

TPS2044

TPS2054

UNIT

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

IOS

Short-circuit output current

VI(INx) = 5 V, OUT connected to GND,

Device enable into short circuit

0.7

0.9

1.1

0.7

0.9

1.1

A

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.