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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TPD3S716QDBQRQ1 Fiches technique(PDF) 7 Page - Texas Instruments |
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TPD3S716QDBQRQ1 Fiches technique(HTML) 7 Page - Texas Instruments |
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7 / 32 page  7 TPD3S716-Q1 www.ti.com SLVSDH9C – MARCH 2016 – REVISED JUNE 2016 Product Folder Links: TPD3S716-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Electrical Characteristics (continued) over operating free-air temperature range, VEN = 0 V, DEN = 0 V, VBUS_SYS = 5 V, VIN = 3.3 V, VD+/VD–/D+/D–/VBUS_CON = float (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VSHRT(RISING) Short-to-ground comparator rising threshold VBUS_CON Increase VBUS_CON voltage from 0 V until the device transitions from the short-circuit to over- current mode of operation 2.5 2.6 2.7 V VSHRT(FALLING) Short-to-ground comparator falling threshold VBUS_CON Set VBUS_SYS = 5 V; VIN = 3.3 V; VEN = 0 V, DEN = 0 V; Decrease VBUS_CON voltage from 5 V until the device transitions from the over-current to short- circuit mode of operation 2.4 2.5 2.6 V VSHRT(HYST) Short-to-ground comparator hysteresis VBUS_CON Difference between VSHRT(RISING) and VSHRT(FALLING) 125 mV ISHRT Short-to-ground current source VBUS_CON Current sourced from VBUS_SYS when device is in short-circuit mode 150 350 mA OVP CIRCUIT—VD+/VD– VOVP(RISING) Input overvoltage protection threshold VD+/VD– Increase VD+ or VD– (with D+ and D–) from 3.3 V to 4.5 V. Measure the value at which FLT is asserted VIN + 0.6 VIN + 0.8 VIN + 1 V VHYS(OVP) Hysteresis on OVP VD+/VD– Difference between rising and falling OVP thresholds on VD+/VD– 50 mV VOVP(FALLING) Input overvoltage protection threshold VD+/VD– Decrease VD+ or VD– (with D+ or D–) from 4.5 V to 2 V. Measure the value at FLT is deasserted VIN + 0.525 VIN + 0.75 VIN + 0.975 V SHORT TO BATTERY V(VBUS_STB) VBUS hotplug short-to- battery tolerance VBUS_CON Charge battery-equivalent capacitor to test voltage then discharge to pin under test through a 1 meter, 18 gauge wire. (See Figure 19 for more details) 18 V V(DATA_STB) Data line hotplug short- to-battery tolerance VD+/VD– 18 V DATA LINE SWITCHES—VD+ to D+ or VD– to D– CON Equivalent On Capacitance Capacitance of D+/D– switches when enabled – measure on connector side at VDx = 0.4 V 6.9 pF RON On Resistance Measure resistance between D+ and VD+ or D– and VD–, voltage between 0 V and 0.4 V 4 6.5 Ω RON(Flat) On Resistance flatness Measure resistance between D+ and VD+ or D– and VD–, sweep voltage between 0 V and 0.4 V 0.2 1 Ω BWON On Bandwidth (–3dB) Measure S21 bandwidth from D+ to VD+ or D– to VD– with voltage swing = 400 mVpp, VCM= 0.2 V 910 MHz BWON_DIFF On Bandwidth (–3dB) Measure SDD21 bandwidth from D+ to VD+ and D– to VD– with voltage swing = 800 mVpp differential, VCM= 0.2 V 1050 MHz Xtalk Crosstalk Measure S21 bandwidth from D+ to VD– or D– to VD+ with voltage swing = 400 mVpp. Make sure to terminate open sides to 50 ohms. f = 480 MHz –28 dB nFET SWITCH—VBUS R(DISCHARGE) Output discharge resistance VEN = 5 V, DEN = 5 V, Set VBUS_CON = 5 V and measure current flow to ground 18 30 k Ω RON VBUS path ON resistance VBUS_CON = 5 V, IOUT = 1.5 A. See Figure 29 for a plot of the maximum VBUS RON possible at a given junction temperature 63 135 m Ω 6.8 Timing Characteristics over operating free-air temperature range, VEN = 0 V, DEN = 0 V, VBUS_SYS = 5 V, VIN = 3.3 V, D+/D– = 45 Ω to GND, VD+/VD–/VBUS_CON = float (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ENABLE PIN tON_HOST Host mode enable on time Time between VEN and DEN asserted low and VBUS and Data FETs turn on, CVBUS_CON = 0 µF 5.7 ms tON_CLIENT Client mode enable on time Time between DEN asserted low and Data FETs turn on. VEN remains high 2.4 ms tOFF_HOST Host mode disable time Time between VEN and DEN deasserted high and VBUS and Data FETs turn off, CVBUS_CON = 0 µF 30 µs |
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Description similaire - TPD3S716QDBQRQ1 |
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