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TPD3S716QDBQRQ1 Fiches technique(PDF) 6 Page - Texas Instruments |
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TPD3S716QDBQRQ1 Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 32 page 6 TPD3S716-Q1 SLVSDH9C – MARCH 2016 – REVISED JUNE 2016 www.ti.com Product Folder Links: TPD3S716-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Electrical Characteristics (continued) over operating free-air temperature range, VEN = 0 V, DEN = 0 V, VBUS_SYS = 5 V, VIN = 3.3 V, VD+/VD–/D+/D–/VBUS_CON = float (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIH High-level input voltage VEN, DEN Set VEN (DEN)= 0 V; Sweep VEN (DEN) to 1.4 V; Measure when VBUS (Data) FET turns off 1.2 V VIL Low-level input voltage VEN, DEN Set VEN (DEN) = 3.3 V; Sweep VEN (DEN) from 3.3 V to 0.5 V; Measure when VBUS (Data) FET turns on 0.8 V IIL Input Leakage Current VEN, DEN V(VEN) (V(DEN))= 3.3 V ; Measure Current into VEN (DEN) pin 1 µA VOL Low-level output voltage FLT IOL = 3 mA 0.4 V OCP CIRCUIT—VBUS ILIM Overcurrent limit, RADJ = 280 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 505 620 mA ILIM Overcurrent limit, RADJ = 158 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 0.905 1.1 A ILIM Overcurrent limit, RADJ = 143 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.005 1.2 A ILIM Overcurrent limit, RADJ = 93.1 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.505 1.8 A ILIM Overcurrent limit, RADJ = 76.8 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.8 2.16 A ILIM Overcurrent limit, RADJ = 66.5 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 2.105 2.57 A ILIM Overcurrent limit, RADJ = 57.6 k Ω ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 2.405 2.93 A ILIM Overcurrent limit, IADJ = GND VBUS Progressively load VBUS_CON until device asserts FLT 550 700 850 mA ILIM Overcurrent limit, IADJ = VBUS_SYS VBUS Progressively load VBUS_CON until device asserts FLT 1.1 1.4 1.7 A OVER TEMPERATURE PROTECTION TSD(RISING) The rising over-temperature protection shutdown threshold VBUS_SYS = 5 V, VEN = 0 V, DEN = 0 V, No Load on VBUS_CON, TA stepped up until FLT is asserted 150 165 180 ℃ TSD(FALLING) The falling over-temperature protection shutdown threshold VBUS_SYS = 5 V, VEN = 0 V, DEN = 0 V, No Load on VBUS_CON, TA stepped down from TSD(RISING) until FLT is deasserted 125 130 142 ℃ TSD(HYST) The over-temperature protection shutdown threshold hysteresis TSD(RISING) – TSD(FALLING) 10 35 55 ℃ OVP CIRCUIT—VBUS VOVP(RISING) Input overvoltage protection threshold VBUS_CON Increase VBUS_CON from 5 V to 7 V. Measure when FLT is asserted 5.6 5.8 6 V VHYS(OVP) Hysteresis on OVP VBUS_CON Difference between rising and falling OVP thresholds on VBUS_CON 50 mV VOVP(FALLING) Input overvoltage protection threshold VBUS_CON Decrease VBUS_CON from 7 V to 5 V. Measure when FLT is deasserted 5.52 5.75 5.98 V VREV_SUPPLY(RISING) Reverse supply detection threshold VBUS_CON – VBUS_SYS Set VBUS_SYS to 5 V. Increase VBUS_CON from VBUS_SYS to VBUS_SYS + 300 mV. Measure the value of VBUS_CON – VBUS_SYS when FLT asserts. 25°C ≤ TA ≤ 125°C 140 200 260 mV VREV_SUPPLY(FALLING) Reverse supply detection threshold VBUS_CON – VBUS_SYS Set VBUS_SYS to 5 V. Decrease VBUS_CON from VBUS_SYS + 300 mV to VBUS_SYS. Measure the value of VBUS_CON – VBUS_SYS when FLT deasserts. 25°C ≤ TA ≤ 125°C 70 120 165 mV VREV_SUPPLY(HYST) Hysteresis on reverse supply detection VBUS_CON – VBUS_SYS Difference between rising and falling reverse supply detection thresholds 80 mV VUVLO(SYS_RISING) Undervoltage lockout rising for VBUS_SYS VBUS_SYS VBUS_SYS voltage rising from 0 V to 5 V 3.1 3.3 3.6 V VHYS(UVLO_SYS) VBUS_SYS UVLO Hysteresis VBUS_SYS Difference between rising and falling UVLO thresholds on VBUS_SYS 50 75 100 mV VUVLO(SYS_FALLING) Undervoltage lockout falling for VBUS_SYS VBUS_SYS VBUS_SYS voltage falling from 5 V to 2.9 V 3 3.2 3.5 V |
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