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UC1584J Datasheet(Fiches technique) 6 Page - Texas Instruments

Numéro de pièce UC1584J
Description  Secondary Side Synchronous Post Regulator
Télécharger  8 Pages
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Fabricant  TI1 [Texas Instruments]
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UC1584J Datasheet(HTML) 6 Page - Texas Instruments

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TEL. (603) 424-2410 FAX (603) 424-3460
the driver during the on-time of the switch. Charge is be-
ing replenished to the bootstrap capacitor during the
off-time of the switch through the bootstrap diode con-
nected between VCC and VFLT as shown in the typical
application diagram.
Soft Start
The UC3584 Soft Start circuitry is designed to implement
closed loop startup of the power supply output. During
Soft Start, the reference to the noninverting input of the
error amplifier is controlled by the voltage across the soft
start capacitor on SS. As this voltage rises, it provides an
increasing reference to the error amplifier. Once the soft
start capacitor charges above the 1.5V precision refer-
ence of the error amplifier, SS gets disconnected from
the noninverting input of the error amplifier. This tech-
nique allows the error amplifier to stay in its linear mode
and to regulate the output voltage of the power supply
according to the gradually increasing reference voltage
on its noninverting input. Further advantage of the closed
loop start up scheme is the absence of output voltage
overshoot during power up of the power supply output.
Fault Detection
Fault Detection feature is implemented to detect exces-
sive overload conditions. Under these conditions the er-
ror amplifier output goes high to command the maximum
duty cycle. As soon as the error amplifier’s output ex-
ceeds 5V, the fault delay capacitor connected to the
CDLY pin starts charging. If CDLY capacitor voltage
reaches 2V before the error amplifier output falls back
below 5V, a fault condition is declared, the PWM output
is disabled and soft start cycle is initiated. Under persis-
tent fault conditions the UC3584 will continuously cycle
through soft start sequence, attempting to bring the out-
put to its regulated, nominal voltage. The value of CDLY
capacitor should be chosen large enough to delay the
activation of the fault sequence in case of load transients
which can also cause the error amplifier output to go
high temporarily.
Error Amplifier
The Error Amplifier of the UC3584 is used to regulate the
voltage of an auxiliary output in a power supply. The
noninverting input of the error amplifier is connected to
an internal, 1.5V reference. The inverting input (FB pin)
is tied to an output voltage divider. The compensation
network of the negative feedback loop is connected be-
tween the amplifier’s output (COMP pin) and FB. The
noninverting input of the error amplifier is also connected
to the SS node through a diode. This arrangement allows
closed loop soft start for the output of a power supply
regulated by the UC3584. Closed loop soft start assures
that the error amplifier is kept in active mode and the out-
put voltage of the converter follows the reference voltage
on its noninverting input as it ramps up (following the SS
node). If a fault condition is detected, SS node gets
pulled to ground, forcing the error amplifier’s reference
low. Consequently, the error amplifier’s output voltage
goes low and duty cycle is reduced.

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