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LMZ31530RLGT Fiches technique(PDF) 7 Page - Texas Instruments |
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LMZ31530RLGT Fiches technique(HTML) 7 Page - Texas Instruments |
7 / 30 page LMZ31530 www.ti.com SLVSBC7B – OCTOBER 2013 – REVISED DECEMBER 2013 PIN DESCRIPTIONS (continued) TERMINAL DESCRIPTION NAME NO. 11 22 23 24 Phase switch node. Do not place any external component on these pins or tie them to a pin of another PH 25 function. Connect these pins using a copper area beneath pad 71. 26 27 28 71 42 43 PVIN 44 Input switching voltage pin. This pin supplies voltage to the power switches of the converter. 66 69 Power Good flag pin. This open drain output asserts low if the output voltage is more than approximately PWRGD 19 ±6% out of regulation. Power Good pull-up pin. This pin is connected to a 100k Ω resistor which is tied to the PWRGD pin internally. PWRGD_PU 18 Connect this pin to V5V or to any voltage between 1.3V and 6.5V. Remote sense connection. Connect this pin to VOUT at the load for improved regulation. This pin must be SENSE+ 14 connected to VOUT at the load, or at the module pins. Slow-start select pin. Connect a resistor between this pin and PWRGD (or PGND) to select the slow-start time. See the SS_SEL section of the datasheet for slow-start times and corresponding resistor values. SS_SEL 3 Connect the SS_SEL pin to PGND to select Auto-skip Eco-mode or to the PWRGD pin (pin 19) to select FCCM. V5V 61 5V regulator pin. This regulator supplies the internal circuitry. VADJ 13 Output voltage adjust pin. Connecting a resistor between this pin and AGND sets the output voltage. 2 VIN Input bias voltage pins. Supplies the control circuitry of the power converter. 15 10 52 53 54 55 Output voltage. These pins are connected to the internal output inductor. Connect these pins to the output VOUT 56 load and connect external bypass capacitors between these pins and PGND. 57 58 59 60 68 Copyright © 2013, Texas Instruments Incorporated 7 Product Folder Links: LMZ31530 |
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