LMZ31520

SLVSBM9B – OCTOBER 2013 – REVISED DECEMBER 2013

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PIN DESCRIPTIONS

TERMINAL

DESCRIPTION

NAME

NO.

This pin is connected internally to the power ground of the device. This pin should only be used as the zero

AGND

9

See Layout Recommendations.

4

8

12

Do Not Connect. Do not connect these pins to AGND, to another DNC pin, or to any other voltage. These

DNC

20

pins are connected to internal circuitry. Each pin must be soldered to an isolated pad.

21

35

36

Frequency Select pin. Leave this pin open (floating) to select 500 kHz (typ) operating frequency. Connect

FREQ_SEL

7

this pin to V5V pin to select 850 kHz (typ) operating frequency. Connect a 66 k

Ω resistor between this pin

and PGND to select 300 kHz (typ) operating frequency. See Table 2 for more info.

Current limit setting pin. Connecting a resistor between this pin and PGND sets the current limit. When left

ILIM

6

open, refer to the Electrical Characterization table for current limit value.

INH

16

Inhibit pin. Use an open drain or open collector logic device to ground this pin to control the INH function.

29

30

Not Connected. These pins are internally isolated from any signal and all other pins. Each pin must be

NC

31

soldered to a pad on the PCB. These pins can be left isolated, connected to one another, or connected to

any signal on the PCB.

32

45

1

5

17

33

34

37

38

39

40

41

This is the return current path for the power stage of the device. Connect these pins to the load and to the

46

bypass capacitors associated with VIN and VOUT. Pads 65, 67, 70, and 72 should be connected to PCB

PGND

47

ground planes using multiple vias for good thermal performance. Not all pins are connected together

internally. All pins must be connected together externally with a copper plane or pour directly under the

48

device.

49

50

51

62

63

64

65

67

70

72

6

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