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SN74GTLP1394PWRE4 Fiches technique(PDF) 4 Page - Texas Instruments |
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SN74GTLP1394PWRE4 Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 23 page www.ti.com Absolute Maximum Ratings (1) SN74GTLP1394 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES286F – OCTOBER 1999 – REVISED APRIL 2005 over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 4.6 V BIAS VCC A inputs, ERC, and control inputs –0.5 7 VI Input voltage range(2) V B port and VREF –0.5 4.6 Y outputs –0.5 7 Voltage range applied to any output in the VO V high-impedance or power-off state(2) B port –0.5 4.6 Y outputs 48 IO Current into any output in the low state mA B port 200 IO Current into any output in the high state(3) 48 mA Continuous current through each VCC or GND ±100 mA IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA D package(4) 73 DGV package(4) 120 θ JA Package thermal impedance °C/W PW package(4) 108 RGY package(5) 39 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) This current flows only when the output is in the high state and VO > VCC. (4) The package thermal impedance is calculated in accordance with JESD 51-7. (5) The package thermal impedance is calculated in accordance with JESD 51-5. 4 |
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