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SM320C40TABC50/10 Fiches technique(PDF) 3 Page - Texas Instruments

No de pièce SM320C40TABC50/10
Description  DIGITAL SIGNAL PROCESSORS
Download  65 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

SM320C40TABC50/10 Fiches technique(HTML) 3 Page - Texas Instruments

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SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
description
The C40 digital signal processors (DSPs) are 32-bit, floating-point processors manufactured in 0.72-μm,
double-level metal CMOS technology. The 320C40 is a part of the fourth-generation DSPs from Texas
Instruments and is designed primarily for parallel processing.
For additional information when designing for cold temperature operation, please see Texas Instruments
application report 320C3x, 320C4x and 320MCM42x Power-up Sensitivity at Cold Temperature, literature
number SGUA001.
operation
The 320C40 has six on-chip communication ports for processor-to-processor communication with no external
hardware and simple communication software. This allows connectivity to other C4x processors with no
external-glue logic. The communication ports remove input/output bottlenecks, and the independent smart
DMA coprocessor is able to handle the CPU input/output burden.
central processing unit
The 320C40 CPU is configured for high-speed internal parallelism for the highest sustained performance. The
key features of the CPU are:
D
Eight operations/cycle:
--
40/32-bit floating-point/integer multiply
--
40/32-bit floating-point/integer arithmetic logic unit (ALU) operation
--
Two data accesses
--
Two address-register updates
D
IEEE floating-point conversion
D
Divide and square-root support
D
C3x assembly language compatibility
D
Byte and halfword accessibility
DMA coprocessor
The DMA coprocessor allows concurrent I/O and CPU processing for the highest sustained CPU performance.
The key features of the DMA processor are:
D
Link pointers that allow DMA channels to autoinitialize without CPU intervention
D
Parallel CPU operation and DMA transfers
D
Six DMA channels that support memory-to-memory data transfers
D
Split-mode operation doubles the available DMA channels to 12 when data transfers to and from a
communication port are required.
communication ports
The C40 is the first DSP with on-chip communication ports for processor-to-processor communication with no
external hardware and simple communication software. The features of the communication ports are:
D
Direct interprocessor communication and processor I/O
D
Six communication ports for direct interprocessor communication and processor I/O
D
20M-byte/s bidirectional interface on each communication port for high-speed multiprocessor interface


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