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AD0345BS8500RF Fiches technique(PDF) 30 Page - Texas Instruments |
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AD0345BS8500RF Fiches technique(HTML) 30 Page - Texas Instruments |
30 / 61 page CLKOUT1 1 3 4 4 2 CLKIN 1 2 3 4 4 SMJ320C6701-SP SGUS030F – APRIL 2000 – REVISED SEPTEMBER 2013 www.ti.com INPUT AND OUTPUT CLOCKS Timing Requirements for CLKIN (1) (see Figure 8) CLKMODE = x4 CLKMODE = x1 NO. UNIT MIN MAX MIN MAX 1 tc(CLKIN) Cycle time, CLKIN 28.4 7.1 ns Pulse duration, 2 tw(CLKINH) 0.4C(2) (3) 0.45C(2) (3) ns CLKIN high Pulse duration, 3 tw(CLKINL) 0.4C(2) (3) 0.45C(2) (3) ns CLKIN low 4 tt(CLKIN) Transition time, CLKIN 5(2) 0.6(2) ns (1) The reference points for the rise and fall transitions ar measured at 20% and 80%, respectively, of VIH. (2) This parameter is not tested. (3) C = CLKIN cycle time in ns. For example, when CLKIN frequency is 10 MHz, use C = 100 ns. Figure 8. CLKIN Timing Switching Characteristics for CLKOUT1 (1) (2) (see Figure 9) CLKMODE = x4 CLKMODE = x1 NO. PARAMETER UNIT MIN MAX MIN MAX 1 tc(CKO1) Cycle time, CLKOUT1 P – 0.7(3) P + 0.7(3) P – 0.7(3) P + 0.7(3) ns 2 tw(CKO1H) Pulse duration, CLKOUT1 high (P/2) – 0.5(3) (P/2) + 0.5(3) PH – 0.5(3) PH + 0.5(3) ns 3 tw(CKO1L) Pulse duration, CLKOUT1 low (P/2) – 0.5(3) (P/2) + 0.5(3) PL – 0.5(3) PL + 0.5(3) ns 4 tt(CKO1) Transition time, CLKOUT1 0.6(3) 0.6(3) ns (1) P = 1/CPU clock frequency in nanoseconds (ns). (2) PH is the high period of CLKIN in ns and PL is the low period of CLKIN in ns. (3) This parameter is not tested. Figure 9. CLKOUT1 Timing 30 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: SMJ320C6701-SP |
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