Moteur de recherche de fiches techniques de composants électroniques
  French  ▼

Delete All
ON OFF
ALLDATASHEET.FR

X  

Preview PDF Download HTML

AD0345AS8500RF Fiches technique(PDF) 25 Page - Texas Instruments

No de pièce AD0345AS8500RF
Description  RAD-TOLERANT CLASS-V FLOATING-POINT DIGITAL SIGNAL PROCESSOR
Download  61 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

AD0345AS8500RF Fiches technique(HTML) 25 Page - Texas Instruments

Back Button AD0345AS8500RF Datasheet HTML 21Page - Texas Instruments AD0345AS8500RF Datasheet HTML 22Page - Texas Instruments AD0345AS8500RF Datasheet HTML 23Page - Texas Instruments AD0345AS8500RF Datasheet HTML 24Page - Texas Instruments AD0345AS8500RF Datasheet HTML 25Page - Texas Instruments AD0345AS8500RF Datasheet HTML 26Page - Texas Instruments AD0345AS8500RF Datasheet HTML 27Page - Texas Instruments AD0345AS8500RF Datasheet HTML 28Page - Texas Instruments AD0345AS8500RF Datasheet HTML 29Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 61 page
background image
CLKMODE0
CLKMODE1
PLL
PLLV
CLKIN
LOOP FILTER
PLLCLK
PLLMULT
CLKIN
Internal to ’C6701
CPU
CLOCK
1
0
3.3V
See Table 3
PLLFREQ1
PLLFREQ2
PLLFREQ3
CLKMODE0
CLKMODE1
PLL
PLLV
CLKIN
LOOP FILTER
PLLCLK
PLLMULT
CLKIN
C2
Internal to ’C6701
CPU
CLOCK
C1
R1
3.3V
10 mF
0.1 mF
C3
C4
1
0
See Table 3
PLLFREQ1
PLLFREQ2
PLLFREQ3
SMJ320C6701-SP
www.ti.com
SGUS030F – APRIL 2000 – REVISED SEPTEMBER 2013
AVAILABLE MULTIPLY FACTORS
CPU CLOCK FREQUENCY
CLKMODE1
CLKMODE0
PLL MULTIPLY FACTORS
F(CPUCLOCK)
0
1
Reserved
Reserved
1
0
Reserved
Reserved
1
1
x4
4 x f(CLKIN)
(1)
Keep the lead length and the number of vias between the PLLF pin, the PLLG pin, and R1, C1, and C2 to a minimum.
In addition, place all PLL external components (R1, C1, C2, C3, C4, and the EMI filter) as close to the ’C6000 device
as possible. For the best performance, TI recommends that all the PLL external components be on a single side of
the board without jumpers, switches, or components other than the ones shown.
(2)
For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (R1, C1,
C2, C3, C4, and the EMI filter).
(3)
The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DVDD.
Figure 5. External PLL Circuitry for Either PLL ×4 Mode or ×1 (Bypass) Mode
(1)
For a system with ONLY PLL x1 (bypass) mode, short the PLLF terminal to the PLLG terminal.
(2)
The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DVDD.
Figure 6. External PLL Circuitry for ×1 (Bypass) Mode Only
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
25
Product Folder Links: SMJ320C6701-SP


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61 


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn