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AD0345AS8500RF Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce AD0345AS8500RF
Description  RAD-TOLERANT CLASS-V FLOATING-POINT DIGITAL SIGNAL PROCESSOR
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

AD0345AS8500RF Fiches technique(HTML) 2 Page - Texas Instruments

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SMJ320C6701-SP
SGUS030F – APRIL 2000 – REVISED SEPTEMBER 2013
www.ti.com
Engineering Evaluation (/EM) Samples are
Available (2)
(2)
These units are intended for engineering evaluation only.
They are processed to a non-compliant flow (e.g. No Burn-In,
etc.) and are tested to a temperature rating of 25°C only.
These units are not suitable for qualification, production,
radiation testing or flight use. Parts are not warranted for
performance over the full MIL specified temperature range of
-55°C to 125°C or operating life.
DESCRIPTION
The SMJ320C67x DSPs are the floating-point DSP family in the SMJ320C6000 platform. The SMJ320C6701
(’C6701) device is based on the high-performance, advanced VelociTI™ very-long-instruction-word (VLIW)
architecture developed by Texas Instruments (TI), making this DSP an excellent choice for multichannel and
multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a
clock rate of 140 MHz, the ’C6701 offers cost-effective solutions to high-performance DSP programming
challenges. The ’C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical
capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight
highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-
point ALUs, and two floating-/fixed-point multipliers. The ’C6701 can produce two multiply-accumulates (MACs)
per cycle for a total of 334 million MACs per second (MMACS). The ’C6701 DSP also has application-specific
hardware logic, on-chip memory, and additional on-chip peripherals.
The ’C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program
memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space.
Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered
serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory
interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.
The ’C6701 has a complete set of development tools that includes a new C compiler, an assembly optimizer to
simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code
execution.
2
Submit Documentation Feedback
Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: SMJ320C6701-SP


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