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ADN2847ACP-32-RL7 Fiches technique(PDF) 7 Page - Analog Devices |
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ADN2847ACP-32-RL7 Fiches technique(HTML) 7 Page - Analog Devices |
7 / 12 page REV. 0 ADN2847 –7– The R PSET and RERSET potentiometers can be calculated using the following formulas. R V I PSET AV = () 12 . Ω R V I P ER ER P ERSET MPD CW CW AV = × − + × () 12 1 1 . _ Ω where: I AV is the average MPD current. P CW is the dc optical power specified on the laser data sheet. I MPD_CW is the MPD current at that specified PCW. P AV is the average power required. ER is the desired extinction ratio (ER = P1/P0). Note that I ERSET and IPSET will change from device to device; however, the control loops will determine actual values. It is not required to know exact values for LI or MPD optical coupling. Loop Bandwidth Selection For continuous operation, the user should hardwire the LBWSET pin high and use 1 µF capacitors to set the actual loop bandwidth. These capacitors are placed between the PAVCAP and ERCAP pins and ground. It is important that these capacitors are low leakage multilayer ceramics with an insulation resistance greater than 100 G Ω or a time constant of 1000 sec, whichever is less. Operation Recommended Recommended Mode LBWSET PAVCAP ERCAP Continuous High 1 µF1 µF 50 Mbps to 3.3 Gbps Optimized Low 22 nF 22 nF for 2.5 Gbps to 3.3 Gbps Setting LBSET low and using 22 nF capacitors results in a shorter loop time constant (a 10 × reduction over using 1 µF capacitors and keeping LBWSET high.) Alarms The ADN2847 is designed to allow interface compliance to ITU- T-G958 (11/94) section 10.3.1.1.2 (transmitter fail) and section 10.3.1.1.3 (transmitter degrade). The ADN2847 has two active high alarms, DEGRADE and FAIL. A resistor between ground and the ASET pin is used to set the current at which these alarms are raised. The current through the ASET resistor is a ratio of 100:1 to the FAIL alarm threshold. The DEGRADE alarm will be raised at 90% of this level. Example: ImA so I mA FAIL DEGRADE == 50 45 I ImA A ASET FAIL == = 100 50 100 500 µ * R V IA k ASET ASET == = 12 12 500 .. 2.4 Ω The laser degrade alarm, DEGRADE, is provided to give a warning of imminent laser failure if the laser diode degrades further or environmental conditions continue to stress the LD, such as increasing temperature. The laser fail alarm, FAIL, is activated when the transmitter can no longer be guaranteed to be SONET/SDH compliant. This occurs when one of the following conditions arises: • The ASET threshold is reached. • The ALS pin is set high. This shuts off the modulation and bias currents to the LD, resulting in the MPD current dropping to zero. This gives closed-loop feedback to the system that ALS has been enabled. DEGRADE will be raised only when the bias current exceeds 90% of ASET current. Monitor Currents IBMON, IMMON, IMPDMON, and IMPDMON2 are current controlled current sources from VCC. They mirror the bias, modu- lation, and MPD current for increased monitoring functionality. An external resistor to GND gives a voltage proportional to the current monitored. If the monitoring functions IMPDMON and IMPDMON2 are not required, the IMPD and IMPD2 pins must be grounded and the monitor photodiode output must be connected directly to the PSET pin. Dual MPD DWDM Function (48-Lead LFCSP Only) The ADN2847 has circuitry for a second monitor photodiode, MPD2. The second photodiode current is mirrored to IMPDMON2 for wavelength control purposes and is summed internally with the first monitor photodiode current for the power control loop. For single MPD circuits, the MPD2 pin is tied to GND. This enables the system designer to use the two currents to control the wavelength of the laser diode using various optical filtering techniques inside the laser module. If the monitor current functions IMPDMON and IMPDMON2 are not required, then the IMPD and IMPD2 pins can be grounded and the monitor photodiode output can be connected directly to PSET. IDTONE (48-Lead LFCSP Only) The IDTONE pin is supplied for fiber identification/supervisory channels or control purposes in WDM. This pin modulates the optical one level over a possible range of 2% of minimum IMOD to 10% of maximum IMOD. The level of modulation is set by connecting an external current sink between the IDTONE pin and ground. There is a gain of two from this pin to the IMOD current. Figure 9 shows how an AD9850/AD9851 or the AD9834 may be used with the ADN2847 to allow fiber identification. If the ID_TONE function is not used, the IDTONE pin should be tied to V CC. Note that using IDTONE during transmission may cause optical eye degradation. Data, Clock Inputs Data and clock inputs are ac-coupled (10 nF capacitors are recommended) and terminated via a 100 Ω internal resistor between DATAP and DATAN, and also between the CLKP and CLKN pins. There is a high impedance circuit to set the common-mode voltage that is designed to allow for maximum input voltage * The smallest valid value for R ASET is 1.2 k Ω, since this corresponds to the I BIAS maximum of 100 mA. |
Numéro de pièce similaire - ADN2847ACP-32-RL7 |
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Description similaire - ADN2847ACP-32-RL7 |
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