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AD9726 Fiches technique(PDF) 1 Page - Analog Devices

No de pièce AD9726
Description  16-Bit, 600 MSPS D/A Converter
Download  24 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9726 Fiches technique(HTML) 1 Page - Analog Devices

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16-Bit, 400 MSPS
D/A Converter
AD9726
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
FEATURES
Dynamic performance
SFDR ≥ 78 dBc @ fOUT = 20 MHz
IMD ≥ 82 dBc @ fOUT = 70 MHz
ACLR ≥ 76 dBc @ fOUT = 70 MHz
NSD ≤ –160 dB/Hz @ fOUT = 70 MHz
Precision calibrated linearity
DNL ≤ ±0.5 LSB @ +25°C
INL ≤ ±1.0 LSB @ +25°C
THD ≤ –95 dB @ fOUT = 1 MHz
LVDS inputs with internal 100 Ω terminations
Automatic data/clock timing synchronization
Single data rate or double data rate capable
Differential current outputs
Internal precision reference
Operates on 2.5 V and 3.3 V supplies
Extended industrial temperature range
Thermally enhanced, 80-lead, lead-free TQFP_EP package
APPLICATIONS
Instrumentation
Test equipment
Waveform synthesis
Communications systems
FUNCTIONAL BLOCK DIAGRAM
INTERNAL
REFERENCE
CALIBRATION
MEMORY
LVDS OUTPUT
DRIVER
SPI
CSB
SDIO
SDO
RESET
IOUTA
IOUTB
REFIO
FSADJ
SCLK
CLK+
CLK–
DCLK_OUT+
DCLK_OUT–
DB[15]+
DB[15]–
DB[0]+
DB[0]–
DCLK_IN+
DCLK_IN–
CLOCK DISTRIBUTION
AND CONTROL
16-BIT
DAC
Figure 1.
.
GENERAL DESCRIPTION
The AD9726 is a 16-bit digital-to-analog converter (DAC)
that offers leading edge performance at conversion rates up to
400 MSPS. The device uses low voltage differential signaling
(LVDS) inputs and includes internal 100 Ω terminations. The
analog output can be single-ended or differential current. An
internal precision reference is included.
The AD9726 also features synchronization logic to monitor and
optimizes the timing between incoming data and the sample clock.
This reduces system complexity and simplifies timing require-
ments. An LVDS clock output is also available to drive an external
data pump in either single data rate (SDR) or double data rate
(DDR) mode.
All device operation is fully programmable using the flexible
serial port interface (SPI). The AD9726 is also fully functional
in its default state for applications without a controller.
PRODUCT HIGHLIGHTS
1.
A unique combination of precision and performance
makes the AD9726 equally suited to applications with
demanding frequency domain or demanding time domain
requirements.
2.
Nonvolatile factory calibration assures a highly linear
transfer function. Internal logic offers on demand self-
calibration for linearity even at extended operating
temperatures.
3.
Proprietary architecture minimizes data dependent,
discrete mixing spurs and offers enhanced dynamic
performance over a wide range of output frequencies.
High input data rates create a very high frequency
synthesis bandwidth.
4.
The fully automatic, transparent synchronizer maintains
optimized timing between clock and data in real time and
offers programmable control options for added flexibility.
5.
Full-scale output current is external resistor programmable.


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