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AD8328ARQ Fiches technique(PDF) 9 Page - Analog Devices |
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AD8328ARQ Fiches technique(HTML) 9 Page - Analog Devices |
9 / 16 page REV. 0 AD8328 –9– states, “Spurious emissions from a transmitted carrier may occur in an adjacent channel that could be occupied by a carrier of the same or different symbol rates.” TPC 3 shows the measured ACP for a 60 dBmV QPSK signal taken at the output of the AD8328 evaluation board. The transmit channel width and adja- cent channel width in TPC 3 correspond to the symbol rates of 160 kSym/s. Table I shows the ACP results for the AD8328 driving a QPSK, 60 dBmV signal for all conditions in DOCSIS Table 6-9, Adjacent Channel Spurious Emissions. Noise and DOCSIS At minimum gain, the AD8328 output noise spectral density is 1.2 nV/ √Hz measured at 10 MHz. DOCSIS Table 6-10, Spurious Emissions in 5 MHz to 42 MHz, specifies the output noise for various symbol rates. The calculated noise power in dBmV for 160 kSym/s is: 20 12 160 60 66 4 2 × × += log . – . nV Hz kHz dBmV Comparing the computed noise power of –66.4 dBmV to the +8 dBmV signal yields –74.4 dBc, which meets the required level set forth in DOCSIS Table 6-10. As the AD8328 gain is increased above this minimum value, the output signal increases at a faster rate than the noise, resulting in a signal-to-noise ratio that improves with gain. In transmit disable mode, the output noise spectral density is 1.1 nV/ √Hz, which results in –67 dBmV when computed over 160 kSym/s. The noise power was measured directly at the output of the AD8328AR-EVAL board. Evaluation Board Features and Operation The AD8328 evaluation board and control software can be used to control the AD8328 upstream cable driver via the parallel port of a PC. A standard printer cable connected to the parallel port of the PC is used to feed all the necessary data to the AD8328 using the Windows®-based control software. This package pro- vides a means of controlling the gain and the power mode of the AD8328. With this evaluation kit, the AD8328 can be evaluated in either a single-ended or differential input configuration. A schematic of the evaluation board is provided in Figure 11. Differential Signal Source Typical applications for the AD8328 use a differential input signal from a modulator or a DAC. See Table II for common values of R4, or calculate other input configurations using the equation in Figure 6. This circuit configuration will give optimal distortion results due to the symmetric input signals. It should be noted that this is the configuration that was used to characterize the AD8328. R Zk kZ IN IN 4 16 16 = × . . – VIN+ AD8328 VIN– R4 ZIN Figure 6. Differential Circuit Differential Signal from Single-Ended Source The default configuration of the evaluation board implements a differential signal drive from a single-ended signal source. This configuration uses a 1:1 balun transformer to approximate a differential signal. Because of the nonideal nature of real trans- formers, the differential signal is not purely equal and opposite in amplitude. Although this circuit slightly sacrifices even order harmonic distortion due to asymmetry, it does provide a con- venient way to evaluate the AD8328 with a single-ended source. The AD8328 evaluation board is populated with a TOKO 617DB-A0070 1:1 for this purpose (T1). Table II provides typical R4 values for common input configurations. Other input impedances may be calculated using the equation in Figure 7. Refer to Figure 10 for an evaluation board schematic. To utilize the transformer for converting a single-ended source into a differential signal, the input signal must be applied to VIN+. R Zk kZ IN IN 4 16 16 = × . . – VIN AD8328 R4 ZIN Figure 7. Single to Differential Circuit Single-Ended Source Although the AD8328 was designed to have optimal DOCSIS performance when used with a differential input signal, the AD8328 may also be used as a single-ended receiver, or an IF digitally controlled amplifier. However, as with the single-ended to differential configuration noted above, even order harmonic distortion will be slightly degraded. When operating the AD8328 in a single-ended input mode, VIN+ and VIN– should be terminated as illustrated in Figure 8. On the AD8328 evaluation boards, this termination method requires the removal of R2 and R3 to be shorted with R4 open, as well as the addition of 82.5 Ω at R1 and 39.2 Ω at R17 for 75 Ω termination. Table II shows the correct values for R11 and R12 for some common input configurations. Other input impedance configurations may be accommodated using the equations in Figure 8. R Z Z R ZR RZ IN IN IN IN 1 800 800 17 1 1 = × = × + – AD8328 R1 R17 VIN+ ZIN Figure 8. Single-Ended Circuit |
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