CDCVF2510_15 datasheet(8/16 Pages) TI1

No de pièce	CDCVF2510

Description	3.3-V PHASE-LOCK LOOP CLOCK DRIVER

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Fabricant	TI1 [Texas Instruments]

Site Internet	http://www.ti.com

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fc - Clock Frequency - MHz

-100

-150

-250

-300

-350

-400

-200

-50

0

VCC = 3.3 V

C(LY) = 25 pF || 500 Ω

C(LF) = 12 pF || 500 Ω

TA = 25°C

See Notes A, B, and C

CLK to FBOUT

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100

80

0

60

40

20

fc - Clock Frequency at FBOUT - MHz

140

50

75

100

125

150

175

200

VCC = 3.3 V

C(LY) = 25 pF || 500 Ω

C(LF) = 12 pF || 500 Ω

TA = 25°C

See Notes C and D

Cycle to Cycle

25

15

10

5

0

20

0

25

50

75

100

125

150

175

AVCC = VCC = 3.6 V

Bias = 0/3 V

C(LY) = 25 pF || 500 Ω

C(LF) = 12 pF || 500 Ω

TA = 25°C

See Notes A and B

fc - Clock Frequency - MHz

200

CDCVF2510

SCAS638C – JULY 2001 – REVISED APRIL 2006

TYPICAL CHARACTERISTICS (continued)

STATIC PHASE ERROR

vs

CLOCK FREQUENCY

Figure 6.

NOTE:

1. Trace length FBOUT to FBIN = 5 mm, Z

O = 50 Ω

2. C

(LY) = Lumped capacitive load Y1-n

3. C

(LFx) = Lumped feedback capacitance at FBOUT = FBIN

JITTER

ANALOG SUPPLY CURRENT

vs

CLOCK FREQUENCY AT FBOUT

CLOCK FREQUENCY

Figure 7.

Figure 8.

8

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