CDCR83A datasheet(6/17 Pages) TI1

No de pièce	CDCR83A

Description	DIRECT RAMBUS??CLOCK GENERATOR

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Fabricant	TI1 [Texas Instruments]

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ELECTRICAL CHARACTERISTICS

CDCR83A

SCAS811 – AUGUST 2005

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS(1)

MIN TYP(2)

MAX

UNIT

VO(STOP)

Output voltage during CLK Stop (STOPB = 0)

See Figure 1

1.1

2

VO(X)

Output crossing-point voltage

See Figure 1 and Figure 6

1.3

1.8

V

VO

Output voltage swing

See Figure 1

0.4

0.6

V

VIK

Input clamp voltage

VDD = 3.135 V,

II = –18 mA

–1.2

V

See Figure 1

2

VOH

High-level output voltage

VDD = min to max,

IOH = –1 mA

VDD– 0.1

V

VDD = 3.135 V,

IOH = –16 mA

2.4

See Figure 1

1

VOL

Low-level output voltage

VDD = min to max,

IOH = 1 mA

0.1

V

VDD = 3.135 V,

IOH = 16 mA

0.5

VDD = 3.135 V,

VO = 1 V

–32

–52

IOH

High-level output current

VDD = 3.3 V,

VO = 1.65 V

–51

mA

VDD = 3.465 V,

VO = 3.135 V

–14.5

–21

VDD = 3.135 V,

VO = 1.95 V

43

61.5

IOL

Low-level output current

VDD = 3.3 V,

VO = 1.65 V

65

mA

VDD = 3.465 V,

VO = 0.4 V

25.5

36

IOZ

High-impedance-state output current

S0 = 0, S1 = 1

±10

µA

IOZ(STOP)

High-impedance-state output current during

Stop = 0, VO = GND or VDD

±100

µA

CLK stop

High-impedance-state output current in

IOZ(PD)

PWRDNB = 0, VO = GND or VDD

–10

100

µA

power-down state

REFCLK, PCLKM,

10

SYNCLKN, STOPB

High-level input

IIH

VDD = 3.465 V,

VI = VDD

µA

current

PWRDNB, S0, S1,

10

S2, MULT0, MULT1

REFCLK, PCLKM,

–10

SYNCLKN, STOPB

Low-level input

IIL

VDD = 3.465 V,

VI = 0

µA

current

PWRDNB, S0, S1,

–10

S2, MULT0, MULT1

High state

RI at IO– 14.5 mA to –16.5 mA

15

35

50

ZO

Output impedance

Ω

Low state

RI at IO 14.5 mA to 16.5 mA

11

17

35

PWRDNB = 0

50

µA

Reference current

VDDIR, VDDIPD

VDD = 3.465 V

PWRDNB = 1

0.5

mA

CI

Input capacitance

VI = VDD or GND

2

pF

CO

Output capacitance

VO = VDD or GND

3

pF

IDD(PD)

Supply current in pwoer-down state

REFCLK = 0 MHz to 100 MHz,

100

µA

PWDNB = 0, STOPB = 1

IDD(CLKSTOP) Supply current in CLK stop state

BUSCLK configured for 400 MHz

30

mA

IDD(NORMAL)

Supply current in normal state

BUSCLK = 400 MHz

70

mA

(1)

VDD refers to any of the following; VDD, VDDIPD, VDDIR, VDDO, VDDC, and VDDP

(2)

All typical values are at VDD = 3.3 V, TA = 25°C.

6

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