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CDC2536DB Fiches technique(PDF) 2 Page - Texas Instruments

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No de pièce CDC2536DB
Description  3.3V PHASE-LOCK LOOP CLOCK DRIVER
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Site Internet  http://www.ti.com
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CDC2536DB Fiches technique(HTML) 2 Page - Texas Instruments

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DETAILED DESCRIPTION OF OUTPUT CONFIGURATIONS
Output Configuration A
Output Configuration B
CDC2536
SCAS377E – APRIL 1994 – REVISED JULY 2004
Because it is based on PLL circuitry, the CDC2536 requires a stabilization time to achieve phase lock of the
feedback signal to the reference signal. This stabilization time is required following power up and application of a
fixed-frequency, fixed-phase signal at CLKIN, as well as following any changes to the PLL reference or feedback
signals. Such changes occur upon change of SEL, enabling the PLL via TEST, and upon enable of all outputs
via OE.
The CDC2536 is characterized for operation from 0
°C to 70°C.
The voltage-controlled oscillator (VCO) used in the CDC2536 has a frequency range of 100 MHz to 200 MHz,
twice the operating frequency of the CDC2536 outputs. The output of the VCO is divided by two and by four to
provide reference frequencies with a 50% duty cycle of one-half and one-fourth the VCO frequency. SEL
determines which of the two signals is buffered to each bank of device outputs.
One device output must be externally wired to FBIN to complete the PLL. The VCO operates such that the
frequency of the output matches that of CLKIN. In the case that a VCO/2 output is wired to FBIN, the VCO must
operate at twice the CLKIN frequency resulting in device outputs that operate at either the same or one-half the
CLKIN frequency. If a VCO/4 output is wired to FBIN, the device outputs operate at the same or twice the CLKIN
frequency.
Output configuration A is valid when any output configured as a 1
× frequency output in Table 1 is fed back to
FBIN. The input frequency range for CLKIN is 50 MHz to 100 MHz when using output configuration A. Outputs
configured as 1/2
× outputs operate at half the CLKIN frequency, while outputs configured as 1× outputs operate
at the same frequency as CLKIN.
Table 1. Output Configuration A
INPUT
OUTPUTS
1/2
×
1
×
SEL
FREQUENCY
FREQUENCY
L
None
All
H
1Yn
2Yn
Output configuration B is valid when any output configured as a 1
× frequency output in Table 2 is fed back to
FBIN. The input frequency range for CLKIN is 25 MHz to 50 MHz when using output configuration B. Outputs
configured as 1
× outputs operate at the CLKIN frequency, while outputs configured as 2× outputs operate at
double the frequency of CLKIN.
Table 2. Output Configuration B
INPUT
OUTPUTS
1
×
2
×
SEL
FREQUENCY
FREQUENCY
H
1Yn
2Yn
L
All
None
2


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