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CD74FCT574M Fiches technique(PDF) 1 Page - Texas Instruments

No de pièce CD74FCT574M
Description  BiCMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

CD74FCT574M Fiches technique(HTML) 1 Page - Texas Instruments

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CD74FCT574
BiCMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCBS745 – JULY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D BiCMOS Technology With Low Quiescent
Power
D Buffered Inputs
D Noninverted Outputs
D Input/Output Isolation From VCC
D Controlled Output Edge Rates
D 48-mA Output Sink Current
D Output Voltage Swing Limited to 3.7 V
D SCR Latch-Up-Resistant BiCMOS Process
and Circuit Design
D 3-State Outputs Drive Bus Lines Directly
D Package Options Include Plastic
Small-Outline (M) and Shrink Small-Outline
(SM) Packages and Standard Plastic (E) DIP
description
The CD74FCT574 is an octal, D-type, edge-triggered flip-flop that features noninverted, 3-state outputs,
designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly
suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
This device uses a small-geometry BiCMOS technology. The output stage is a combination of bipolar and
CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output
swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes
VCC bounce and ground bounce and their effects during simultaneous output switching. The output
configuration also enhances switching speed and is capable of sinking 48 mA.
The eight flip-flops enter data into their registers on the low-to-high transition of the clock (CLK). On the positive
transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
The output-enable (OE) input controls the 3-state outputs and is independent of the register operation. OE can
be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance
state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. Old data can
be retained or new data can be entered while the outputs are in the high-impedance state.
The CD74FCT574 is characterized for operation from 0
°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
Q
L
H
H
L
LL
L
H or L
X
Q0
H
X
X
Z
Copyright
© 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
E, M, OR SM PACKAGE
(TOP VIEW)


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