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DAC7512N-250G4 Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce DAC7512N-250G4
Description  Low-Power, Rail-to-Rail Output, 12-Bit Serial Input
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DAC7512N-250G4 Fiches technique(HTML) 2 Page - Texas Instruments

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DAC7512
2
SBAS156B
www.ti.com
VDD to GND ........................................................................... –0.3V to +6V
Digital Input Voltage to GND .................................. –0.3V to +VDD + 0.3V
VOUT to GND ........................................................... –0.3V to +VDD + 0.3V
Operating Temperature Range ..................................... –40°C to +105°C
Storage Temperature Range ......................................... –65°C to +150°C
Junction Temperature Range (TJ max) ......................................... +150°C
SOT23 Package:
Power Dissipation .................................................. (TJ max — TA)/ JA
JA Thermal Impedance ......................................................... 240°C/W
Lead Temperature, Soldering:
Vapor Phase (60s) ............................................................... +215°C
Infrared (15s) ........................................................................ +220°C
MSOP Package:
Power Dissipation ........................................................ (TJ max — TA)/ JA
JA Thermal Impedance ......................................................... 206°C/W
JC Thermal Impedance ........................................................... 44°C/W
Lead Temperature, Soldering:
Vapor Phase (60s) ............................................................... +215°C
Infrared (15s) ........................................................................ +220°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS(1)
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE
DIFFERENTIAL
SPECIFIED
ACCURACY
NONLINEARITY
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
(LSB)
(LSB)
PACKAGE-LEAD
DESIGNATOR(1)
RANGE
MARKING
NUMBER(1)
MEDIA, QUANTITY
DAC7512E
±8
±1
MSOP-8
DGK
–40°C to +105°C
D12E
DAC7512E/250
Tape and Reel, 250
""
"
"
"
"
"
DAC7512E/2K5
Tape and Reel, 2500
DAC7512N
±8
±1
SOT23-6
DBV
–40°C to +105°C
D12N
DAC7512N/250
Tape and Reel, 250
""
"
"
"
"
"
DAC7512N/3K
Tape and Reel, 3000
NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) Models with a slash (/) are available only in Tape
and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “DAC7512E/2K5” will get a single 2500-piece Tape and Reel.
PIN
NAME
DESCRIPTION
1VOUT
Analog output voltage from DAC. The output ampli-
fier has rail-to-rail operation.
2
GND
Ground reference point for all circuitry on the part.
3VDD
Power Supply Input, +2.7V to 5.5V.
4DIN
Serial Data Input. Data is clocked into the 16-bit
input shift register on the falling edge of the serial
clock input.
5
SCLK
Serial Clock Input. Data can be transferred at rates
up to 30MHz.
6
SYNC
Level triggered control input (active LOW). This is
the frame sychronization signal for the input data.
When SYNC goes LOW, it enables the input shift
register and data is transferred in on the falling
edges of the following clocks. The DAC is updated
following the 16th clock cycle unless SYNC is taken
HIGH before this edge, in which case the rising
edge of SYNC acts as an interrupt and the write
sequence is ignored by the DAC7512.
PIN DESCRIPTION (SOT23-6)
PIN CONFIGURATIONS
Top View
SOT23-6
MSOP-8
V
DD
NC
NC
V
OUT
GND
D
IN
SCLK
SYNC
1
2
3
4
8
7
6
5
DAC7512
NC = No Internal Connection
V
OUT
GND
V
DD
SYNC
SCLK
D
IN
1
2
3
6
5
4
DAC7512
DAC7512N LOT TRACE LOCATION
Pin 1
D12N
Top View
Pin 1
YMLL
Bottom View
Lot Trace Code


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