OE

A

GND

VCC

Y

SN74LVC1G126

Input signal 1

from system

Output 1 to long

PCB trace or

high-Z logic input

0.1 2F

1.65 V to 5 V

SN74LVC1G126

www.ti.com

SCES224R – APRIL 1999 – REVISED JANUARY 2015

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

10.1 Application Information

The SN74LVC1G126 device is a high-drive CMOS device that can be used as an output enabled buffer with a

high output drive, such as an LED application. It can produce 24 mA of drive current at 3.3 V, making it ideal for

driving multiple outputs and good for high speed applications up to 100 MHz. The inputs are 5.5-V tolerant

10.2 Typical Application

Figure 5. Application Schematic

10.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus

contention because it can drive currents that would exceed maximum limits. Outputs can be combined to

produce higher drive but the high drive will also create faster edges into light loads, so routing and load

conditions should be considered to prevent ringing.

10.2.2 Detailed Design Procedure

1. Recommended Input Conditions:

–

For rise time and fall time specifications, see

Δt/ΔV in the Recommended Operating Conditions table.

–

–

2. Recommend Output Conditions:

–

Load currents should not exceed 50 mA per output and 100 mA total for the part.

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