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SN74ALVTH162245LR Fiches technique(PDF) 2 Page - Texas Instruments |
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SN74ALVTH162245LR Fiches technique(HTML) 2 Page - Texas Instruments |
2 / 15 page SN54ALVTH162245, SN74ALVTH162245 2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES331A – APRIL 2000 – REVISED APRIL 2002 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. terminal assignments 12 34 5 6 A 1DIR NC NC NC NC 1OE B 1B2 1B1 GND GND 1A1 1A2 C 1B4 1B3 VCC VCC 1A3 1A4 D 1B6 1B5 GND GND 1A5 1A6 E 1B8 1B7 1A7 1A8 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 H 2B5 2B6 VCC VCC 2A6 2A5 J 2B7 2B8 GND GND 2A8 2A7 K 2DIR NC NC NC NC 2OE NC – No internal connection ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP – DL Tape and reel SN74ALVTH162245LR ALVTH162245 40 °Cto85°C TSSOP – DGG Tape and reel SN74ALVTH162245GR ALVTH162245 –40 °C to 85°C TVSOP – DGV Tape and reel SN74ALVTH162245VR VT2245 VFBGA – GQL Tape and reel SN74ALVTH162245QR –55 °C to 125°C CFP – WD Tube SNJ54ALVTH162245WD SNJ54ALVTH162245WD † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each 8-bit section) INPUTS OPERATION OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation SN74ALVTH162245 . . . GQL PACKAGE (TOP VIEW) J H G F E D C B A 2 13 4 6 5 K |
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