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74ACT11109 Datasheet(Fiches technique) 4 Page - Texas Instruments

Numéro de pièce 74ACT11109
Description  DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
Télécharger  5 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
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54ACT11109, 74ACT11109
DUAL JK POSITIVEEDGETRIGGERED FLIPFLOPS
WITH CLEAR AND PRESET
SCAS451 − FEBRUARY 1987 − REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
2−4
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per flip-flop
CL = 50 pF,
f = 1 MHz
31
pF
PARAMETER MEASUREMENT INFORMATION
50% VCC
1.5 V
1.5 V
1.5 V
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V
1.5 V
3 V
0 V
50% VCC
50% VCC
Input
(see Note B)
Out-of-Phase
Output
In-Phase
Output
Timing Input
(see Note B)
50% VCC
VOLTAGE WAVEFORMS
3 V
0 V
1.5 V
1.5 V
tw
VOLTAGE WAVEFORMS
Input
LOAD CIRCUIT
From Output
Under Test
CL = 50 pF
(see Note A)
500
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms




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