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74ACT11158DWR Fiches technique(PDF) 1 Page - Texas Instruments |
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74ACT11158DWR Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 5 page 74ACT11158 QUADRUPLE 2LINE TO 1LINE DATA SELECTOR/MULTIPLEXER SCAS181 − D3979, JANUARY 1992 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1993, Texas Instruments Incorporated 2−1 • Inputs Are TTL-Voltage Compatible • Flow-Through Architecture Optimizes PCB Layout • Center-Pin V CC and GND Pin Configurations Minimize High-Speed Switching Noise • EPIC (Enhanced-Performance Implanted CMOS) 1- µm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description This data selector/multiplexer contains inverters and drivers to supply full data selection to the four output gates. A separate output-enable (OE) input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The 74ACT11158 provides inverted data. The 74ACT11158 is characterized for operation from −40 °C to 85°C. FUNCTION TABLE INPUTS OUTPUT OE A/B A B OUTPUT Y H X X X H L LL X H L LH X L L HX L H L H X H L logic symbol† OE MUX 20 1A 1 19 1B EN 10 G1 1 1Y 2 18 2A 17 2B 2Y 3 14 3A 13 3B 3Y 8 12 4A 11 4B 4Y 9 A/B † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 A/B 1Y 2Y GND GND GND GND 3Y 4Y OE 1A 1B 2A 2B VCC VCC 3A 3B 4A 4B DW OR N PACKAGE (TOP VIEW) 4Y 3Y 2Y 1Y 9 8 3 2 A/B OE 4B 4A 3B 3A 2B 2A 1B 1A 1 10 11 12 13 14 17 18 19 20 logic diagram (positive logic) EPIC is a trademark of Texas Instruments Incorporated. |
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Description similaire - 74ACT11158DWR |
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