ADC10DV200EB datasheet(9/26 Pages) TI1

No de pièce	ADC10DV200EB

Description	Dual 10-bit, 200 MSPS Low-Power A/D Converter with Parallel LVDS/CMOS Outputs

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Fabricant	TI1 [Texas Instruments]

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VA

AGND

To Internal Circuitry

I/O

ADC10DV200

www.ti.com

SNAS471A – FEBRUARY 2009 – REVISED APRIL 2013

Power Supply Electrical Characteristics

Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, VA = VD = VDR = +1.8V, fCLK = 200

MHz, CLK duty cycle = 50%, DCS = ON, Internal 0.75V Reference, LVDS Output. Typical values are for TA = 25°C. Boldface

limits apply for TMIN ≤ TA ≤ TMAX. All other limits apply for TA = 25°C

(1) (2)

Typical

Units

Symbol

Parameter

Conditions

Limits

(3)

(Limits)

LVDS OUTPUT MODE

Full Operation, Internal Bias

160

mA

IA

Analog Supply Current

Full Operation, External 3.3k

Ω Bias

148

184

mA (max)

ID

Digital Supply Current

Full Operation

36

43

mA (max)

IDR

Output Driver Supply Current

64

80

mA (max)

Internal Bias

473

mW

Power Consumption

External 3.3k

Ω Bias

450

524

mW (max)

Power Down Power Consumption

PDA=PDB=VA

57

mW

CMOS OUTPUT MODE (4)

Full Operation, Internal Bias

138

IA

Analog Supply Current

mA

Full Operation, External 3.3k

Ω Bias

124

ID

Digital Supply Current

Full Operation

31

mA

Internal Bias

310

Power Consumption

mW

External 3.3k

Ω Bias

280

Power Down Power Consumption

PDA=PDB=VA

60

mW

(1)

The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided

current is limited per Note 4 under the Absolute Maximum Ratings. However, errors in the A/D conversion can occur if the input goes

above VA or below AGND.

(2)

With a full scale differential input of 1.5VP-P , the 10-bit LSB is 1.465mV.

(3)

Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical

specifications are not ensured.

(4)

CMOS Specifications are for FCLK = 170 MHz.

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