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DAC1219 Fiches technique(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce DAC1219
Description  12-Bit Binary Multiplying D/A Converter
Download  12 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

DAC1219 Fiches technique(HTML) 6 Page - National Semiconductor (TI)

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Application Hints (Continued)
TLH5691 – 5
FIGURE 2 Unipolar Output Voltage
TLH5691 – 6
FIGURE 3 Zeroing an Amplifier Which Does Not Have Balancing Provisions
The selected amplifier should have as low an input bias
current as possible since input bias current contributes to
the current flowing through the feedback resistor BI-FETTM
op amps such as the LF356 or LF351 or bipolar op amps
with super b input transistors like the LM11 or LM308A pro-
duce negligible errors
22 Zero and Full-Scale Adjustments
The fundamental purpose is to make the output voltages as
near 0 VDC as possible This is accomplished in the circuit
of
Figure 2 by shorting out the amplifier feedback resist-
ance and adjusting the VOS nulling potentiometer of the op
amp until the output reads zero volts This is done of
course with an applied digital input of all zeros if IOUT1 is
driving the op amp (all ones for IOUT2) The feedback short
is then removed and the converter is zero adjusted
A unique characteristic of these DACs is that any full-scale
or gain error is always negative This means that for a full-
scale input code the output voltage if not inherently correct
will always be less than what it should be This ensures that
adding an appropriate resistance in series with the internal
feedback resistor RFb will always correct for any gain error
The 50X potentiometer in
Figure 2 is all that is needed to
adjust the worst case DAC gain error
Conversion accuracy is only as good as the applied refer-
ence voltage so providing a source that is stable over time
and temperature is important
23 Output Settling Time
The output voltage settling time for this circuit in response
to a change of the digital input code (a full-scale change is
the worst case) is a combination of the DAC’s output current
settling characteristics and the settling characteristics of the
output amplifier The amplifier settling is further degraded by
a feedback pole formed by the feedback resistance and the
DAC output capacitance (which varies with the digital code)
First order compensation for this pole is achieved by adding
a feedback zero with capacitor CC shown in Figure 2
In many applications output response time and settling is
just as important as accuracy It can be difficult to find a
single op amp that combines excellent DC characteristics
(low VOS VOS drift and bias current) with fast response and
settling time BI-FET op amps offer a reasonable compro-
mise of high speed and good DC characteristics The circuit
of
Figure 4 illustrates a composite amplifier connection that
combines the speed of a BI-FET LF351 with the excellent
DC input characteristics of the LM11 If output settling time
is not so critical the LM11 can be used alone
Figure 5 is a settling time test circuit for the complete volt-
age output DAC circuit The circuit allows the settling time of
the DAC amplifier to be measured to a resolution of 1 mV
out of a zero to g10V full-scale output change on an oscil-
loscope
Figure 6 summarizes the measured settling times
for several output amplifiers and feedback compensation
capacitors
VOUT ebVREF
A12aA24aA38a A12
4096
J
where ANe1 if digital input is high
ANe0 if digital input is low
6


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