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CGS2536V Fiches technique(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce CGS2536V
Description  Commercial, Industrial Quad 1 to 4 Clock Drivers
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

CGS2536V Fiches technique(HTML) 6 Page - National Semiconductor (TI)

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CGS2534353637
Memory Array Driving
In order to minimize the total load on the address bus quite
often memory arrays are driven by buffers while having the
inputs of the buffers tied together Although this practice
was feasible in the conventional memory designs in today’s
high speed large buswidth designs which require address
fetching at higher speeds this technique produces many
undesired results such as cross-talk and overundershoot
CGS2534353637 Quad 1 to 4 clock drivers were de-
signed specifically to address these application issues on
high speed large memory arrays systems
These drivers are optimized to drive large loads with 35 ns
propagation delays These drivers produce less noise while
reducing the total capacitive loading on the address bus by
having only four inputs tied together (see the diagram be-
low point A) This helps to minimize the overshoot and un-
dershoot by having only four outputs being switched simul-
taneously
Also this larger fan-out helps to save board space since for
every one of these drivers two conventional buffers were
typically being used
Another feature associated with these clock drivers is a
350 ps pin-to-pin skew specification The minimum skew
specification allows high speed memory system designers
to optimize the performance of their memory sub-system by
operating at higher frequencies without having concerns
about output-to-output (bank-to-bank) synchronization prob-
lem which are associated with driving high capacitive loads
(Point B)
The diagram below depicts a ‘‘2534353637’’ a memory
subsystem operating at high speed with large memory ca-
pacity The address bus is common to both the memory and
the CPU and IOs
These drivers can operate beyond 125 MHz and are also
available in 3V – 5V TTLCMOS versions with large current
drive
Device
VCC
IO
Output Configuration
2534
5
TTL
Inverting quad 1–4
2535
3 or 5
CMOS
Non-inverting quad 1–4
2536
3 or 5
CMOS
Inverting Non-inverting d2
2537
5
TTL
Inverting quad 1–4 with series 8X output resistors
TLF12325 – 7
6


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