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SN74CBTLV3253 Fiches technique(PDF) 9 Page - Texas Instruments |
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SN74CBTLV3253 Fiches technique(HTML) 9 Page - Texas Instruments |
9 / 27 page 2 µ SN74CBTLV3253 www.ti.com SCDS039I – DECEMBER 1997 – REVISED SEPTEMBER 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SN74CBTLV3253 can be used to multiplex and demultiplex up to 2 channels simultaneously in a 4:1 configuration. The application shown here is a 2-bit bus being multiplexed between two devices. the OE and S pins are used to control the chip from the bus controller. This is a very generic example, and could apply to many situations. 9.2 Typical Application Figure 3. Typical Application of the SN74CBTLV3253 9.2.1 Design Requirements The 0.1µF capacitor should be placed as close as possible to the device. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions: – For specified high and low levels, see VIH and VIL in Recommended Operating Conditions . – Inputs and outputs are overvoltage tolerant slowing them to go as high as 4.6 V at any valid VCC. 2. Recommended Output Conditions: – Load currents should not exceed ±128 mA per channel. 3. Frequency Selection Criterion: – Added trace resistance/capacitance can reduce maximum frequency capability; use layout practices as directed in Layout. Copyright © 1997–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SN74CBTLV3253 |
Numéro de pièce similaire - SN74CBTLV3253_15 |
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Description similaire - SN74CBTLV3253_15 |
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