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SKY13596-397LF Fiches technique(PDF) 1 Page - Skyworks Solutions Inc.

No de pièce SKY13596-397LF
Description  0.4 to 3.8 GHz DPDT Switch
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Fabricant  SKYWORKS [Skyworks Solutions Inc.]
Site Internet  http://www.skyworksinc.com
Logo SKYWORKS - Skyworks Solutions Inc.

SKY13596-397LF Fiches technique(HTML) 1 Page - Skyworks Solutions Inc.

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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
203871A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • February 12, 2016
1
PRODUCT SUMMARY
SKY13596-397LF: 0.4 to 3.8 GHz DPDT Switch
Applications
 Simultaneous voice and LTE systems
 Diversity antenna switching
Features
 Single control voltage input
 Broadband frequency range: 0.4 to 3.8 GHz
 Low insertion loss: 0.5 dB @ 2.7 GHz
 No DC blocking capacitors required
 Positive control voltage range: 1.35 to 3.1 V
 GSM power handling
 Small, QFN (12-pin, 2 x 2 mm) package
(MSL1, 260
C per JEDEC J-STD-020)
Skyworks GreenTM products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to
Skyworks
Definition of GreenTM, document number
SQ04–0074.
203871A-001
PORT4
PORT1
PORT3
PORT2
Figure 1. SKY13596-397LF Block Diagram
Description
The SKY13596-397LF is a state-of-the-art CMOS, Silicon-On-
Insulator (SOI) double-pole, double-throw (DPDT) switch. The
switch provides high-linearity performance, low insertion loss,
and high isolation.
Switching is controlled by one voltage input, CTRL1. Depending
on the logic voltage level applied to this pin, the PORT1 and
PORT2 pins connect to one of the two other RF port pins (PORT3
or PORT4) through a low insertion loss path, while maintaining a
high isolation path to the alternate port. No external DC blocking
capacitors are required on the RF path as long as no DC voltage is
applied externally.
The SKY13596-397LF DPDT switch is provided in a compact
Quad Flat No-Lead (QFN) 2 x 2 mm package. A functional block
diagram is shown in Figure 1.


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