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TPS3710DDCT Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS3710DDCT Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 24 page GND VDD GND OUT GND SENSE 1 2 3 6 5 4 OUT GND SENSE 6 5 4 GND VDD GND 1 2 3 TPS3710 www.ti.com SBVS271 – OCTOBER 2015 5 Pin Configuration and Functions DDC Package DSE Package 6-Pin SOT 6-Pin WSON Top View Top View Pin Functions PIN I/O DESCRIPTION NAME DDC DSE GND 2, 4, 6 1, 3, 5 — Connect all three pins to ground. SENSE comparator open-drain output. OUT is driven low when the voltage at this OUT 1 6 O comparator is below (VIT-). The output goes high when the sense voltage returns above the respective threshold (VIT+). This pin is connected to the voltage to be monitored with the use of an external resistor SENSE 3 4 I divider. When the voltage at this pin drops below the threshold voltage (VIT-), OUT is driven low. Supply voltage input. Connect a 1.8-V to 18-V supply to VDD to power the device. Good VDD 5 2 I analog design practice is to place a 0.1-µF ceramic capacitor close to this pin. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS3710 |
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