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ADC08100CIMT Fiches technique(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce ADC08100CIMT
Description  8-Bit, 20 MSPS to 100 MSPS, 1.3 mW/MSPS A/D Converter
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

ADC08100CIMT Fiches technique(HTML) 6 Page - National Semiconductor (TI)

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Converter Electrical Characteristics (Continued)
The following specifications apply for V
A =DRVD = +3.0VDC,VRT = +1.9V, VRB = 0.3V, CL = 10 pF, fCLK = 100 MHz at 50%
duty cycle. Boldface limits apply for T
A =TMIN to TMAX: all other limits TA = 25˚C (Notes 7, 8)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
POWER SUPPLY CHARACTERISTICS
DR I
D
Output Driver Supply Current
DC Input
1
2
mA (max)
f
IN = 10 MHz, VIN =FS−3dB
8
mA (max)
I
A +
DRI
D
Total Operating Current
DC Input
42
52
mA (max)
f
IN = 10 MHz, VIN =FS−3dB,
PD = Low
49
CLK Low, PD = Hi
0.2
PC
Power Consumption
DC Input
126
156
mW (max)
f
IN = 10 MHz, VIN =FS−3dB,
PD = Low
147
mW
CLK Low, PD = Hi
0.6
mW
PSRR
1
Power Supply Rejection Ratio
FSE change with 2.7V to 3.3V change
in V
A
54
dB
PSRR
2
Power Supply Rejection Ratio
SNR change with 200 mV at 1 MHz
on supply
TBD
dB
AC ELECTRICAL CHARACTERISTICS
f
C1
Maximum Conversion Rate
125
100
MHz (min)
f
C2
Minimum Conversion Rate
20
MHz
t
CL
Minimum Clock Low Time
4.5
ns (min)
t
CH
Minimum Clock High Time
4.5
ns (min)
t
OH
Output Hold Time
CLK Rise to Data Invalid
4.4
ns
t
OD
Output Delay
CLK Rise to Data Valid
5.9
8.5
ns (max)
Pipeline Delay (Latency)
2.5
Clock Cycles
t
AD
Sampling (Aperture) Delay
CLK Fall to Acquisition of Data
1.5
ns
t
AJ
Aperture Jitter
2
ps rms
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AGND or DR GND, or greater than VA or DR VD), the current at that pin
should be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input
current of 25 mA to two.
Note 4: The absolute maximum junction temperature (TJmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (
θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX=(TJmax − TA)/ θJA. In the 24-pin
TSSOP,
θJA is 92˚C/W, so PDMAX = 1,358 mW at 25˚C and 435 mW at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
this device under normal operation will typically be about 162 mW (126 mW quiescent power + 12 mW reference ladder power + 24 mW to drive the output bus
capacitance). The values for maximum power dissipation listed above will be reached only when the ADC08100 is operated in a severe fault condition (e.g., when
input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
Ω resistor. Machine model is 220 pF discharged through ZERO Ohms.
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to VA + 300 mV or to 300 mV below GND will not damage this device.
However, errors in the A/D conversion can occur if the input goes above DR VD or below GND by more than 100 mV. For example, if VA is 2.7VDC the full-scale input
voltage must be
≤2.6VDC to ensure accurate conversions.
www.national.com
6


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