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AD9993 Fiches technique(PDF) 1 Page - Analog Devices |
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AD9993 Fiches technique(HTML) 1 Page - Analog Devices |
1 / 56 page Integrated Mixed-Signal Front End (MxFE) Data Sheet AD9993 Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Quad 14-bit 250 MSPS ADC SFDR = 83 dBc at 87 MHz input Dual 14-bit 500 MSPS DAC SFDR = 75 dBc at 20 MHz output On-chip PLL clock synthesizer Low power 1536 mW, 1 GHz master clock, on-chip synthesizer 500 MHz double data rate (DDR) LVDS interfaces for DACs and ADCs Small 12 mm × 12 mm lead-free BGA package APPLICATIONS Point to point microwave backhaul radios Wireless repeaters GENERAL DESCRIPTION The AD9993 is a mixed-signal front-end (MxFE®) device that integrates four 14-bit ADCs and two 14-bit DACs. Figure 1 shows the block diagram of the MxFE. The MxFE is programmable using registers accessed via a serial peripheral interface (SPI). ADC and DAC datapaths include FIFO buffers to absorb phase differences between LVDS lane clocks and the data converter sampling clocks. The MxFE DACs are part of the Analog Devices, Inc., high speed CMOS DAC core family. These DACs are designed to be used in wide bandwidth communication system transmitter (Tx) signal chains. The MxFE ADCs are multistage pipelined CMOS ADC cores designed for use in communications receivers. FUNCTIONAL BLOCK DIAGRAM Figure 1. ADC_A ADC_B DIGITAL MxFE AD9993 –ADC AND DAC DATAPATHS –CONTROLS –SPI REGISTERS –FIFO BUFFERS CLOCK GENERATOR PLL DIV ADC_C ADC_D DAC_A DAC_B 2 14 DCO CLOCK STROBE DCI_x STROBE_x DCO_x DOUT3D_x TO DOUT0D_x DIN6A_x TO DIN0A_x DIN6B_x TO DIN0B_x DOUT3C_x TO DOUT0C_x DOUT3B_x TO DOUT0B_x DOUT3A_x TO DOUT0A_x ALERT RST SPI_SCLK, SPI_CS, SPI_SDI, SPI_SDO 4 DCI CLOCK 14 4 14 2 14 2 14 2 14 2 14 2 14 LVDS BUFFER LVDS BUFFER 0 1 31.25MHz OR 62.5MHz 1GHz |
Numéro de pièce similaire - AD9993 |
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Description similaire - AD9993 |
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