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TPIC2040DBTRG4 Fiches technique(PDF) 3 Page - Texas Instruments |
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TPIC2040DBTRG4 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 57 page 1 2 LOAD+ LOAD- 3 4 5 SLED1+ SLED1- SLED2+ SLED2- 6 7 8 9 CP2 CP1 CP3 W 10 SSZ 11 SCLK U 12 SIMO 13 SOMI V 14 SIOV 15 XRESET MCOM 16 XFG PGND_1 PGND_2 PGND_SPM 17 XMUTE TRK- 18 TRK+ 19 FCS- 38 FCS+ 37 CV3P3 36 TLT+ TLT- 35 23 AGND/DGND P5V_SPM P5V_1 34 24 LIN3VG 33 25 LINFB/GPOUT 32 26 P5V_2/A5V CSWO 31 27 30 28 29 20 21 22 TPIC2040 www.ti.com SLIS172 – DECEMBER 2015 5 Description (continued) As the output stage of all channels works in efficient PWM driving, it is possible to attain low-power operation by PWM control. Deadband less control is possible for a focus / tracking / tilt actuator driver. In addition, the spindle part output current limiting circuit, thermal shutdown circuit, sled-end detection circuit, actuator protection and power-reset circuit are built in. 6 Pin Configuration and Functions DBT Package 38-Pin TSSOP Top View Pin Functions PIN I/O DESCRIPTION NO. NAME 1 LOAD+ O Load positive output terminal 2 LOAD– O Load negative output terminal 3 PGND_1 PS GND terminal 4 SIOV PS Power supply terminal for serial port typical 3.3 V 5 SSZ I SIO slave select low active input terminal 6 SCLK I SIO serial clock input terminal 7 SIMO I SIO slave input master output terminal 8 SOMI O SIO slave output master input terminal Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPIC2040 |
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