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TPD4E6B06DPWR Fiches technique(PDF) 8 Page - Texas Instruments |
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TPD4E6B06DPWR Fiches technique(HTML) 8 Page - Texas Instruments |
8 / 15 page TPD4E6B06 SLVSCK3A – MAY 2014 – REVISED DECEMBER 2015 www.ti.com Feature Description (continued) 7.3.7 Clamping Voltage The IO pins feature an ESD clamp capable of clamping the voltage to 10 V (IO to GND) or 9 V (GND to IO) of IEC61000-4-5 surge when IPP = 1 A. 7.3.8 Industrial Temperature Range This device features an industrial operating range of –40 °C to 125 °C. 7.3.9 Space Saving DPW Package The small 0.8 mm x 0.8 mm package size saves board space and makes it easy to add ESD protection. 7.4 Device Functional Modes TPD4E6B06 is a passive integrated circuit that triggers when voltages are above VBRF or VBRR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. Once the voltages on the protected line fall below the trigger levels of TPD4E6B06 (usually within 10’s of nano-seconds) the device reverts to passive. 8 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: TPD4E6B06 |
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