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TPD2E007 Fiches technique(PDF) 6 Page - Texas Instruments |
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TPD2E007 Fiches technique(HTML) 6 Page - Texas Instruments |
6 / 16 page IO1 IO2 GND 6 TPD2E007 SLVS796H – SEPTEMBER 2008 – REVISED JANUARY 2016 www.ti.com Product Folder Links: TPD2E007 Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The TPD2E007 an ESD protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, etc.) without compromising signal integrity. The PicoStar package is intended to be embedded inside the printed circuit board which saves board space in portable applications. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector. 7.2 Functional Block Diagram Figure 5. Equivalent Schematic Representation 7.3 Feature Description The TPD2E007 an ESD protection device designed to offer system level ESD solutions for wide range of portable and industrial applications. The back-to-back diode array allows AC-coupled or negative-going data transmission (audio interface, LVDS, RS-485, RS-232, etc.) without compromising signal integrity. The PicoStar package is intended to be embedded inside the printed circuit board which saves board space in portable applications. This device exceeds the IEC 61000-4-2 (Level 4) ESD protection and is ideal for providing system level ESD protection for the internal ICs when placed near the connector. 7.3.1 IEC 61000-4-2 Level 4 ESD Protection The I/O pins can withstand ESD events up to ±12-kV contact and ±15 kV-air. An ESD/surge clamp diverts the current to ground. 7.3.2 IEC 61000-4-5 Surge Protection The I/O pins can withstand surge events up to 4.5 A (8/20 µs waveform). An ESD/surge clamp diverts this current to ground. 7.3.3 IO Capacitance The capacitance between each I/O pin to ground is 15 pF. 7.3.4 Low 50-nA Leakage Current The I/O pins feature a low 50-nA (max) leakage current. 7.3.5 Space-Saving PicoStar and SOT Package This device is offered in both a space-saving PicoStar package, as well as a standard DCK package. 7.4 Device Functional Modes TPD2E007 is a passive integrated circuit that triggers when voltages are above or below VBR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. Once the voltages on the protected line fall below the trigger levels of TPD2E007 (usually within 10’s of nano-seconds) the device reverts to passive. |
Numéro de pièce similaire - TPD2E007_16 |
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Description similaire - TPD2E007_16 |
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