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DAC081C081 Fiches technique(PDF) 10 Page - Texas Instruments

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No de pièce DAC081C081
Description  8-Bit Micro Power Digital-to-Analog Converter
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DAC081C081 Fiches technique(HTML) 10 Page - Texas Instruments

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10
DAC081C081, DAC081C085
SNAS449E – FEBRUARY 2008 – REVISED JANUARY 2016
www.ti.com
Product Folder Links: DAC081C081 DAC081C085
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
(1)
Cb refers to the capacitance of one bus line. Cb is expressed in pF units.
(2)
Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are specified to TI's AOQL (Average Outgoing
Quality Level).
(3)
This parameter is ensured by design and/or characterization and is not tested in production.
(4)
Applies to the Multiplying DAC configuration. In this configuration, the reference is used as the analog input. The value loaded in the
DAC Register will digitally attenuate the signal at Vout.
7.6 AC and Timing Characteristics
The following specifications apply for VA = 2.7 V to 5.5 V, VREF = VA, RL = Infinity, CL = 200 pF to GND. All Maximum and
Minimum limits apply for TMIN ≤ TA ≤ TMAX and all Typical limits are at TA = 25°C, unless otherwise specified.
PARAMETER
TEST CONDITIONS(1)
MIN
TYP(2)
MAX(1)(2)
UNIT
ts
Output voltage settling time(3)
40h to C0h code change
RL = 2 kΩ, CL = 200 pF
3
4.5
µs
SR
Output slew rate
1
V/µs
Glitch impulse
Code change from 80h to 7Fh
12
nV-sec
Digital feedthrough
0.5
nV-sec
Multiplying bandwidth(4)
VREF = 2.5 V ± 0.1 Vpp
160
kHz
Total harmonic distortion(4)
VREF = 2.5 V ± 0.1 Vpp
input frequency = 10 kHz
70
dB
tWU
Wake-up time
VA = 3 V
0.8
µsec
VA = 5 V
0.5
µsec
DIGITAL TIMING SPECS (SCL, SDA)
fSCL
Serial clock frequency
Standard mode
100
kHz
Fast mode
400
High-speed mode, Cb = 100 pF
3.4
MHz
High-speed mode, Cb = 400 pF
1.7
tLOW
SCL low time
Standard mode
4.7
µs
Fast mode
1.3
High-speed mode, Cb = 100 pF
160
ns
High-speed mode, Cb = 400 pF
320
tHIGH
SCL high time
Standard mode
4
µs
Fast mode
0.6
High-speed mode, Cb = 100 pF
60
ns
High-speed mode, Cb = 400 pF
120
tSU;DAT
Data set-up time
Standard mode
250
ns
Fast mode
100
High-speed mode
10
tHD;DAT
Data hold time
Standard mode
0
3.45
µs
Fast mode
0
0.9
High-speed mode, Cb = 100 pF
0
70
ns
High-speed mode, Cb = 400 pF
0
150
tSU;STA
Set-up time for a start or a
repeated start condition
Standard mode
4.7
µs
Fast mode
0.6
High-speed mode
160
ns
tHD;STA
Hold time for a start or a
repeated start condition
Standard mode
4
µs
Fast mode
0.6
High-speed mode
160
ns
tBUF
Bus free time between a stop
and start condition
Standard mode
4.7
µs
Fast mode
1.3
tSU;STO
Set-up time for a stop condition
Standard mode
4
µs
Fast mode
0.6
High-speed mode
160
ns


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