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DLPC3435 Fiches technique(PDF) 5 Page - Texas Instruments

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No de pièce DLPC3435
Description  Display Controller
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DLPC3435 Fiches technique(HTML) 5 Page - Texas Instruments

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DLPC3430, DLPC3435
www.ti.com
DLPS038B – JULY 2014 – REVISED FEBRUARY 2016
Product Folder Links: DLPC3430 DLPC3435
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
Pin Functions – Board Level Test, Debug, and Initialization (continued)
PIN
I/O
DESCRIPTION
NAME
NUMBER
TSTPT_1
R13
B1
Test pin 1 (includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for test output. Should be left open or unconnected for normal use.
Note: An external pullup should not be applied to this pin to avoid putting the DLPC343x in a
test mode.
Without external pullup(2)
Feeds TMSEL(1)
With external pullup(3)
Feeds TMSEL(1)
TSTPT_2
R14
B1
Test pin 2 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for test output. Should be left open or unconnected for normal use.
Note: An external pullup should not be applied to this pin to avoid putting the DLPC343x in a
test mode.
Without external pullup(2)
Feeds TMSEL(2)
With external pullup(3)
Feeds TMSEL(2)
TSTPT_3
R15
B1
Test pin 3 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for for test output. Should be left open or unconnected for normal use.
TSTPT_4
P14
B1
Test pin 4 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for for test output. Should be left open or unconnected for normal use.
TSTPT_5
P15
B1
Test pin 5 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for test output. Should be left open or unconnected for normal use.
TSTPT_6
N14
B1
Test pin 6 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for test output. should be left open or unconnected for normal use.
Alternative use: none. External logic shall not unintentionally pull this pin high to avoid putting
the DLPC343x in a test mode.
TSTPT_7
N15
B1
Test pin 7 (Includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ and then driven as an output.
Normal use: reserved for test output. should be left open or unconnected for normal use.


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