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DLPC3430 Fiches technique(PDF) 4 Page - Texas Instruments

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No de pièce DLPC3430
Description  Display Controller
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DLPC3430 Fiches technique(HTML) 4 Page - Texas Instruments

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DLPC3430, DLPC3435
DLPS038B – JULY 2014 – REVISED FEBRUARY 2016
www.ti.com
Product Folder Links: DLPC3430 DLPC3435
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
(1)
If operation does not call for an external pullup and there is no external logic that might overcome the weak internal pulldown resistor,
then this I/O can be left open or unconnected for normal operation. If operation does not call for an external pullup, but there is external
logic that might overcome the weak internal pulldown resistor, then an external pulldown resistor is recommended to ensure a logic low.
(2)
External pullup resistor must be 8 k
Ω, or less, for pins with internal pullup or down resistors.
(3)
If operation does not call for an external pullup and there is no external logic that might overcome the weak internal pulldown resistor,
then the TSTPT I/O can be left open/ unconnected for normal operation. If operation does not call for an external pullup, but there is
external logic that might overcome the weak internal pulldown resistor, then an external pulldown resistor is recommended to ensure a
logic low.
Pin Functions – Board Level Test, Debug, and Initialization
PIN
I/O
DESCRIPTION
NAME
NUMBER
HWTEST_EN
C10
I6
Manufacturing test enable signal. This signal should be connected directly to ground on the
PCB for normal operation.
PARKZ
C13
I6
DMD fast PARK control (active low Input) (hysteresis buffer). PARKZ must be set high to
enable normal operation. PARKZ should be set high prior to releasing RESETZ (that is, prior to
the low-to-high transition on the RESETZ input). PARKZ should be set low for a minimum of 40
µs before any power is removed from the DLPC343x such that the fast DMD PARK operation
can be completed. Note for PARKZ, fast PARK control should only be used when loss of power
is eminent and beyond the control of the host processor (for example, when the external power
source has been disconnected or the battery has dropped below a minimum level). The longest
lifetime of the DMD may not be achieved with the fast PARK operation. The longest lifetime is
achieved with a normal PARK operation. Because of this, PARKZ is typically used in
conjunction with a normal PARK request control input through GPIO_08. The difference being
that when the host sets PROJ_ON low, which connects to both GPIO_08 and the DLPA2000
PMIC chip, the DLPC343x takes much longer than 40 µs to park the mirrors. The DLPA2000
holds on all power supplies, and keep RESETZ high, until the longer mirror parking has
completed. This longer mirror parking time, of up to 500 µs, ensures the longest DMD lifetime
and reliability.
The DLPA2000 monitors power to the DLPC343x and detects an eminent power loss condition
and drives the PARKZ signal accordingly.
Reserved
P12
I6
TI internal use. Should be left unconnected.
Reserved
P13
I6
TI internal use. Should be left unconnected.
Reserved
N13(1)
O1
TI internal use. Should be left unconnected.
Reserved
N12(1)
O1
TI internal use. Should be left unconnected.
Reserved
M13
I6
TI internal use. Should be left unconnected.
Reserved
N11
I6
TI internal use. Should be left unconnected.
Reserved
P11
I6
TI internal use
This pin must be tied to ground, through an external 8-k
Ω, or less, resistor for normal operation.
Failure to tie this pin low during normal operation will cause startup and initialization problems.
RESETZ
C11
I6
DLPC343x power-on reset (active low input) (hysteresis buffer). Self-configuration starts when a
low-to-high transition is detected on RESETZ. All ASIC power and clocks must be stable before
this reset is de-asserted. Note that the following signals will be tri-stated while RESETZ is
asserted:
SPI0_CLK, SPI0_DOUT, SPI0_CSZ0,
SPI0_CSZ1, and GPIO(19:00)
External pullups or downs (as appropriate) should be added to all tri-stated output signals listed
(including bidirectional signals to be configured as outputs) to avoid floating ASIC outputs
during reset if connected to devices on the PCB that can malfunction. For SPI, at a minimum,
any chip selects connected to the devices should have a pullup.
Unused bidirectional signals can be functionally configured as outputs to avoid floating ASIC
inputs after RESETZ is set high.
The following signals are forced to a logic low state while RESETZ is asserted and
corresponding I/O power is applied:
LED_SEL_0, LED_SEL_1 and DMD_DEN_ARSTZ
No signals will be in their active state while RESETZ is asserted.
Note that no I2C activity is permitted for a minimum of 500 ms after RESETZ (and PARKZ) are
set high.
TSTPT_0
R12
B1
Test pin 0 (includes weak internal pulldown) – tri-stated while RESETZ is asserted low.
Sampled as an input test mode selection control approximately 1.5 µs after de-assertion of
RESETZ, and then driven as an output.
Normal use: reserved for test output. Should be left open or unconnected for normal use.
Note: An external pullup should not be applied to this pin to avoid putting the DLPC343x in a
test mode.
Without external pullup (2)
Feeds TMSEL(0)
With external pullup(3)
Feeds TMSEL(0)


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