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DLP7000BFLP Fiches technique(PDF) 9 Page - Texas Instruments

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No de pièce DLP7000BFLP
Description  LVDS Type A DMD
Download  52 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DLP7000BFLP Fiches technique(HTML) 9 Page - Texas Instruments

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DLP7000
www.ti.com
DLPS026D – AUGUST 2012 – REVISED NOVEMBER 2015
Pin Functions (continued)
PIN(1)
TYPE
DATA
INTERNAL
SIGNAL
CLOCK
DESCRIPTION
TRACE
(I/O/P)
RATE(2)
TERM(3)
NAME
NO.
Data bandwidth
MODE_A
D8
Input
LVCMOS
Pull-down
396.05
mode select
MODE_B
C11
Input
LVCMOS
Pull-down
208.86
MICROMIRROR BIAS CLOCKING PULSE
MBRST(0)
P2
Input
Analog
MBRST(1)
AB4
Input
Analog
MBRST(2)
AA7
Input
Analog
MBRST(3)
N3
Input
Analog
MBRST(4)
M4
Input
Analog
MBRST(5)
AB6
Input
Analog
MBRST(6)
AA5
Input
Analog
Micromirror Bias
Clocking Pulse
"MBRST" signals
"clock"
MBRST(7)
L3
Input
Analog
micromirrors into
state of LVCMOS
memory cell
associated with
each mirror.
MBRST(8)
Y6
Input
Analog
MBRST(9)
K4
Input
Analog
MBRST(10)
L5
Input
Analog
MBRST(11)
AC5
Input
Analog
MBRST(12)
Y8
Input
Analog
MBRST(13)
J5
Input
Analog
MBRST(14)
K6
Input
Analog
MBRST(15)
AC7
Input
Analog
POWER
A7, A15,
C1, E1, U1,
Power for
VCC
Power
Analog
W1, AB2,
LVCMOS Logic
AC9, AC15
A21, A27,
D30, M30,
Power supply for
VCC1
Power
Analog
Y30, AC21,
LVDS Interface
AC27
Power for High
G1, J1, L1,
VCC2
Power
Analog
Voltage CMOS
N1, R1
Logic
Copyright © 2012–2015, Texas Instruments Incorporated
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