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DLP5500BFYA Fiches technique(PDF) 4 Page - Texas Instruments |
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DLP5500BFYA Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 46 page DLP5500 DLPS013F – APRIL 2010 – REVISED MAY 2015 www.ti.com 6 Description (continued) The XGA resolution has the direct benefit of scanning large objects for 3D machine vision applications. Reliable function and operation of the DLP5500 requires that it be used in conjunction with the DLPC200 digital controller and the DLPA200 analog driver. This dedicated chipset provides a robust, high resolution XGA, and high speed system solution. 7 Pin Configuration and Functions FYA Package 149-Pin CPGA Series 450 Bottom View Pin Functions PIN(1) TYPE DATA INTERNAL TRACE SIGNAL CLOCK DESCRIPTION (I/O/P ) RATE(2) TERM(3) (mils)(4) NAME NO. DATA INPUTS D_AN1 G20 Input LVCMOS DDR Differential DCLK_A 715 D_AP1 H20 Input LVCMOS DDR Differential DCLK_A 744 D_AN3 H19 Input LVCMOS DDR Differential DCLK_A 688 D_AP3 G19 Input LVCMOS DDR Differential DCLK_A 703 D_AN5 F18 Input LVCMOS DDR Differential DCLK_A 686 D_AP5 G18 Input LVCMOS DDR Differential DCLK_A 714 D_AN7 E18 Input LVCMOS DDR Differential DCLK_A 689 D_AP7 D18 Input LVCMOS DDR Differential DCLK_A 705 Input data bus A (LVDS) D_AN9 C20 Input LVCMOS DDR Differential DCLK_A 687 D_AP9 D20 Input LVCMOS DDR Differential DCLK_A 715 D_AN11 B18 Input LVCMOS DDR Differential DCLK_A 715 D_AP11 A18 Input LVCMOS DDR Differential DCLK_A 732 D_AN13 A20 Input LVCMOS DDR Differential DCLK_A 686 D_AP13 B20 Input LVCMOS DDR Differential DCLK_A 715 D_AN15 B19 Input LVCMOS DDR Differential DCLK_A 700 D_AP15 A19 Input LVCMOS DDR Differential DCLK_A 719 (1) The following power supplies are required to operate the DMD: VCC, VCCI, VCC2. VSS must also be connected. (2) DDR = Double Data Rate. SDR = Single Data Rate. Refer to the Timing Requirements for specifications and relationships. (3) Refer to Electrical Characteristics for differential termination specification. (4) Internal Trace Length (mils) refers to the Package electrical trace length. See the DLP® 0.55 XGA Chip-Set Data Manual (DLPZ004) for details regarding signal integrity considerations for end-equipment designs. 4 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: DLP5500 |
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