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SL23EP09NZSC-1H Fiches technique(PDF) 8 Page - Silicon Laboratories

No de pièce SL23EP09NZSC-1H
Description  Low Jitter and Skew DC to 220 MHz Clock Buffer
Download  11 Pages
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Fabricant  SILABS [Silicon Laboratories]
Site Internet  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SL23EP09NZSC-1H Fiches technique(HTML) 8 Page - Silicon Laboratories

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Rev 2.2, May 6, 2008
Page 8 of 11
SL23EP09NZ
Switching Electrical Characteristics (I-Grade)
Unless otherwise stated VDD= 2.5V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C
Description
Symbol
Condition
Min
Typ
Max
Unit
Output Frequency Range
FOUT1
CL=15pf
0
180
MHz
FOUT2
CL=30pf
0
80
MHz
Input Duty Cycle
DC1
Measured at VDD/2
20
50
80
%
Output Duty Cycle
DC2
CL=15pF, Fout=166MHz
Measured at VDD/2
45
50
55
%
Output Duty Cycle
DC3
CL=30pF, Fout=100MHz
Measured at VDD/2
40
50
60
%
Output Rise/Fall Time
tr/f-1
Measured at 0.8V to 2.0V
CL=15pF
1.8
ns
Output Rise/Fall Time
tr/f-2
Measured at 0.8V to 2.0V
CL=30pF
2.2
ns
Output Skew
SKW1
Measured at VDD/2 and
Outputs are equally loaded
100
200
ps
Part to Part Skew
SKW2
Measured at VDD/2 and
Outputs are equally loaded
140
280
ps
Propagation Delay Time
PDT
Measured at VDD/2 from CLKIN to
Output Clock rising edge and Outputs
are equally loaded
2.5
4.0
5.5
ns
Cycle-to-Cycle Jitter
CCJ1
CLKIN=66MHz and CL=0 (No Load)
60
120
ps
Cycle-to-Cycle Jitter
CCJ2
CLKIN=133MHz and CL=0 (No Load)
50
100
ps


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