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CDCM7005ZVA Fiches technique(PDF) 8 Page - Texas Instruments |
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CDCM7005ZVA Fiches technique(HTML) 8 Page - Texas Instruments |
8 / 52 page CDCM7005 SCAS793F – JUNE 2005 – REVISED JULY 2015 www.ti.com 7.4 Thermal Information CDCM7005 RGZ ZVA RGZ ZVA THERMAL METRIC(1) AIRFLOW AIRFLOW UNIT (VQFN) (BGA) (lfm) (m/s) 48 PINS 64 PINS 0 0 29.9 53.9 150 1 24.7 49.8 RθJA Junction-to-ambient thermal resistance °C/W 250 2 23.2 48.5 500 – 21.5 – RθJC(top) Junction-to-case (top) thermal resistance 22.4 28.3 °C/W RθJB Junction-to-board thermal resistance 14.2 38.6 °C/W 0 0 0.2 0.7 150 1 0.2 0.7 ψJT Junction-to-top characterization parameter °C/W 250 2 0.2 0.8 500 – 0.3 – ψJB Junction-to-board characterization parameter – – °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT OVERALL fVCXO = 245.76 MHz, fREF_IN = 30.72 MHz, ICC_LVPECL 210 260 mA PFD = 240 kHz, ICP = 2 mA, all outputs are LVPECL and Div-by-8 (load, see Figure 13) Supply current (ICC over frequency see Figure 1 through Figure 4) fVCXO = 245.76 MHz, fREF_IN = 30.72 MHz, ICC_LVCMOS 120 150 mA PFD = 240 kHz, ICP = 2 mA, All outputs are LVCMOS and Div-by-8 (load, 10 pF) fIN = 0 MHz, VCC = 3.6 V, AVCC = 3.6 V, ICCPD Power-down current VCC_CP = 3.6 V, 100 300 µA VI = 0 V or VCC VO = 0 V or VCC – 0.8 V ±40 µA High-impedance state output current for Yx IOZ outputs VO = 0 V or VCC ±100 µA Voltage on I_REF_CP (external current path VI_REF_CP 12 k Ω to GND at pin D8 (BGA), pin 22 (QFN) 1.21 V for accurate charge pump current) VBB Output reference voltage VCC = 3 V – 3.6 V; IBB = –0.2 mA VCC–1.3 V CO Output capacitance for Yx VCC = 3.3 V, VO = 0 V or VCC 2 pF Input capacitance at PRI_REF and VI = 0 V or VCC, VI = 0 V or VCC 2.7 SEC_REF CI pF Input capacitance at CTRL_LE, VI = 0 V or VCC 2 CTRL_CLOCK, CTRL_DATA LVCMOS Output frequency, see (2), (3), Figure 6, and fclk Load = 5 pF to GND, 1 k Ω to VCC, 1 kΩ to GND 250 MHz Figure 7 VIK LVCMOS input clamp voltage VCC = 3 V, II = –18 mA –1.2 V LVCMOS input current for CTRL_LE, II VI = 0 V or VCC, VCC = 3.6 V ±5 µA CTRL_CLK, CTRL_DATA (1) All typical values are at VCC = 3.3 V, temperature = 25°C. (2) fclk can be up to 400 MHz in the typical operating mode (25°C / 3.3-V VCC). The total power consumption limit of 700 mW for the BGA package can be violated if several LVCMOS outputs switch at high frequency (see Figure 3 and Figure 4). (3) Operating the LVCMOS or LVPECL output above the maximum frequency will not cause a malfunction to the device, but the output signal swing may no longer meet the output specification. 8 Submit Documentation Feedback Copyright © 2005–2015, Texas Instruments Incorporated Product Folder Links: CDCM7005 |
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