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AD7124-4BCPZ-RL Fiches technique(PDF) 5 Page - Analog Devices |
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AD7124-4BCPZ-RL Fiches technique(HTML) 5 Page - Analog Devices |
5 / 90 page Data Sheet AD7124-4 Rev. A | Page 5 of 90 SPECIFICATIONS AVDD = 2.9 V to 3.6 V (full power mode), 2.7 V to 3.6 V (mid and low power mode), IOVDD = 1.65 V to 3.6 V, AVSS = DGND = 0 V, REFINx(+) = 2.5 V, REFINx(−) = AVSS, all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter1 Min Typ Max Unit Test Conditions/Comments ADC Output Data Rate, fADC Low Power Mode 1.17 2400 SPS Mid Power Mode 2.34 4800 SPS Full Power Mode 9.38 19,200 SPS No Missing Codes2 24 Bits FS3 > 2, sinc4 filter 24 Bits FS3 > 8, sinc3 filter Resolution See the RMS Noise and Resolution section RMS Noise and Update Rates See the RMS Noise and Resolution section Integral Nonlinearity (INL) Low Power Mode2 −4 ±1 +4 ppm of FSR Gain = 1 −15 ±2 +15 ppm of FSR Gain > 1, TA = −40°C to +85°C −20 ±2 +20 ppm of FSR Gain > 1, TA = −40°C to +105°C Mid Power Mode2 −4 ±1 +4 ppm of FSR Gain = 1 −15 ±2 +15 ppm of FSR Gain > 1 Full Power Mode −4 ±1 +4 ppm of FSR Gain = 12 −15 ±2 +15 ppm of FSR Gain > 1 Offset Error4 Before Calibration ±15 µV Gain = 1 to 8 200/gain µV Gain = 16 to 128 After Internal Calibration/System Calibration In order of noise Offset Error Drift vs. Temperature5 Low Power Mode 10 nV/°C Gain = 1 or gain > 16 80 nV/°C Gain = 2 to 8 40 nV/°C Gain = 16 Mid Power Mode 10 nV/°C Gain = 1 or gain > 16 40 nV/°C Gain = 2 to 8 20 nV/°C Gain = 16 Full Power Mode 10 nV/°C Gain Error4, 6 Before Internal Calibration −0.0025 +0.0025 % Gain = 1, TA = 25°C −0.3 % Gain > 1 After Internal Calibration −0.016 +0.004 +0.016 % Gain = 2 to 8, TA = 25°C ±0.025 % Gain = 16 to 128 After System Calibration In order of noise Gain Error Drift vs. Temperature 1 2 ppm/°C Power Supply Rejection AIN = 1 V/gain, external reference Low Power Mode 84 dB Gain = 2 to 16 91 dB Gain = 1 or gain > 16 Mid Power Mode2 89 dB Gain = 2 to 16 95 dB Gain = 1 or gain > 16 Full Power Mode 96 dB |
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Description similaire - AD7124-4BCPZ-RL |
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