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FAN501AMPX Fiches technique(PDF) 11 Page - Fairchild Semiconductor

No de pièce FAN501AMPX
Description  Offline DCM / CCM Flyback PWM Controller for Charger Applications
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN501AMPX Fiches technique(HTML) 11 Page - Fairchild Semiconductor

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© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN501A
• Rev. 1.0.0
11
operation range. It is typical to design the voltage divider
for the VS pin such that frequency change occurs at
170 VAC (VDC-170 VAC = 240 V); calculated as:
1
/
240
AP
VS
VS H
NN
R
I -

(8)
With the value of RVS1 determined from Equation (8), the
switching frequency drops to 85 kHz as line voltage
increases above 170 VAC, while switching frequency
increases to 140 kHz, as line voltage drops <155 VAC.
1/140kHz
1/140kHz
Low line
High line
IDS
IDS
VDS
VDS
1/140kHz
1/85kHz
IDS
IDS
VDS
VDS
Low line
High line
(a) Single frequency operation
(b) Dual frequency operation
Figure 24.
Peak Switch Current, Single- and
Dual-Frequency Operation
Brownout Protection
Line voltage information is also used for brownout
protection. When the IVS current out of the VS pin during
the MOSFET conduction time is less than 160
μA for
longer than 30 ms, the brownout protection is triggered.
When setting RVS1 as calculated in Equation (8), the
brownout level is set at 30 VAC.
Aux.
VS
IVS
Line Voltage
Detector
5V
RVS1
RVS2
IVS
VAux
NA
NP
Pri.
VBLK
GATE
Line signal
VS_Offset
Figure 25.
Line Voltage Detection Circuit
tON
VAux
VS
GATE
tS
-
A
BLK
S
N
V
N
0.5V
Figure 26.
Waveforms for Line Voltage Detection
Maximum Power Limit by Precision CC Control
Primary-side current-sensing voltage is used to estimate
the output current for CC regulation. However, the
actual output current regulation is also affected by the
turn-off delay of the MOSFET, as illustrated in Figure
27. While FAN501A samples the CS pin voltage at the
half on-time of gate drive signal, the actual turn-off is
delayed by the MOSFET gate charge and driving
current resulting in peak current detection error as:
.
PK
DL
DS
OFF DLY
m
V
It
L

(9)
where Lm is the primary side magnetic inductance.
As can be seen, the error is proportional to the line
voltage. FAN501A has an internal correction function to
improve CC regulation, as shown in Figure 28. Line
information is obtained through the line voltage detector
as shown in Figure 25 and Figure 26 and this
information is used for the CC regulation correction. The
correction gain can be programmed using external
resistor RCOMP on the COMP pin. This correction
current, ILVF, flows through internal resistor, RLVF, and
external resistor, RCSF, to introduce offset voltage on
current sensing voltage. Thus, the primary current
detection error affected by line voltage and turn-off
delay is corrected for better CC regulation. The RCOMP
resistor can be calculated as:
.
1
CS
OFF DLY
P
COMP
VS
COMP
A
LVF
CSF
m
Rt
N
R
R
K
N
R
R
L
+
(10)
where RLVF is the internal resistor on the IC, which is
2.0
kΩ, and KCOMP is the design factor of the IC, which
is 3.745
MΩ.


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