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FXLS8471Q Fiches technique(PDF) 9 Page - Freescale Semiconductor, Inc |
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FXLS8471Q Fiches technique(HTML) 9 Page - Freescale Semiconductor, Inc |
9 / 75 page FXLS8471Q Sensors Freescale Semiconductor, Inc. 9 3 Example FXLS8471Q Driver Code 3.1 Introduction It is very straightforward to configure the FXLS8471Q and start receiving data from the three accelerometerchannels. Unfortunately, since every hardware platform will be different, it is not possible to provide completely portable software drivers. This section therefore provides real FXLS8471Q driver code for a Kinetis uC board running under the MQX operating system. The I2C functions s_i2c_read_regs and s_i2c_write_regs are not provided here and should be replaced with the corresponding low level I2C driver code on the development platform. 3.2 FXLS8471Q Addresses This section lists the I2C address of the FXLS8471Q. The I2C address depends on the logic level of FXLS8471Q pins SA0 and SA1 so the I2C address may be 0x1C, 0x1D, 0x1E or 0x1F. Example 1. // FXLS8471Q I2C address #define FXLS8471Q_SLAVE_ADDR 0x1E // with pins SA0=0, SA1=0 Some of the key FXLS8471Q internal register addresses are listed below. Example 2. // FXLS8471Q internal register addresses #define FXLS8471Q_STATUS 0x00 #define FXLS8471Q_WHOAMI 0x0D #define FXLS8471Q_XYZ_DATA_CFG 0x0E #define FXLS8471Q_CTRL_REG1 0x2A #define FXLS8471Q_WHOAMI_VAL 0x6A The reference driver here does a block read of the FXLS8471Q status byte plus three 16-bit accelerometer channels. Example 3. // number of bytes to be read from FXLS8471Q #define FXLS8471Q_READ_LEN 7// status plus 3 accelerometer channels 3.3 Sensor data structure The high and low bytes of the three accelerometer are placed into a structure of type SRAWDATA containing three signed short integers. Example 4. typedef struct { int16_t x; int16_t y; int16_t z; } SRAWDATA; |
Numéro de pièce similaire - FXLS8471Q |
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Description similaire - FXLS8471Q |
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