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TPS65279DAPR Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS65279DAPR Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 38 page Power Pad 2 PGND1 3 PVIN2 4 PGOOD1 5 V 7V 6 MODE 7 8 9 VIN 10 PGND2 11 12 13 31 PGND2 30 BST2 29 LX 2 28 LX 2 27 SS2 26 COMP1 25 SS1 24 LX 1 23 LX 1 22 PGND1 21 BST1 20 RLIM 2 PVIN1 EN2 RLIM 1 14 15 19 18 COMP2 FB2 ROSC PGOOD2 PVIN1 PVIN2 ISHARE EN1 16 17 1 32 FB1 AGND LX1 COMP1 SS1 PVIN2 1 2 3 4 5 6 11 12 13 14 15 16 PVIN2 ROSC 24 23 22 21 20 25 34 33 32 31 30 ISHARE MODE Thermal Pad 17 V7V VIN PVIN1 7 8 9 PVIN1 PGND1 SS2 LX2 LX2 27 26 COMP2 AGND 28 10 18 19 29 36 35 TPS65279 www.ti.com SLVSC85C – AUGUST 2013 – REVISED MAY 2015 5 Description (continued) Low-side reverse overcurrent protection also prevents excessive sinking current from damaging the converter. TPS65279 also features a light load pulse skipping mode (PSM) controlled by MODE pin configuration. The TPS65279 is available in a 32-pin thermally-enhanced HTSSOP (DAP) package and 36-pin 6-mm × 6-mm VQFN (RHH) package. 6 Pin Configuration and Functions DAP Package RHH Package 32-Pin HTSSOP 36-Pin VQFN Top View Top View Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS65279 |
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