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N01S830BAT22IT Fiches technique(PDF) 2 Page - ON Semiconductor

No de pièce N01S830BAT22IT
Description  1 Mb Ultra-Low Power Serial SRAM
Download  13 Pages
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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N01S830HA, N01S830BA
http://onsemi.com
2
Table 2. PIN NAMES
Pin Name
Pin Function
CS
Chip Select
SCK
Serial Clock
SI / SIO0
Data Input − SPI mode
Data Input/Output 0 − DUAL and QUAD mode
SO / SIO1
Data Output − SPI mode
Data Input/Output 1 − DUAL and QUAD mode
NC / SIO2
No Connect − SPI and DUAL mode
Data Input/Output 2 − QUAD mode
HOLD / SIO3
HOLD Version
HOLD Input − SPI and DUAL mode
Data Input/Output 3 − QUAD mode
VBAT
BBU Version
Battery Supply − SPI and DUAL mode
VCC
Power
VSS
Ground
Figure 1. Functional Block Diagram
SRAM
Array
Control
Logic
Interface
Circuitry
Decode
Logic
Data Flow
Circuitry
CS
SI / SIO0
SO / SIO1
SIO2
HOLD / SIO3
SCK
Battery Controls
VBAT
(HOLD Version)
(BBU Version)
Table 3. CONTROL SIGNAL DESCRIPTIONS
Signal
Mode
Used
Name
Description
CS
All
Chip Select
A low level selects the device and a high level puts the device in standby mode. If CS is brought
high during a program cycle, the cycle will complete and then the device will enter standby mode.
When CS is high, SO is in high-Z. CS must be driven low after power-up prior to any sequence
being started.
SCK
All
Serial Clock
Synchronizes all activities between the memory and controller. All incoming addresses, data and
instructions are latched on the rising edge of SCK. Data out is updated after the falling edge of
SCK.
SI
SPI
Serial Data In
Receives instructions, addresses and data on the rising edge of SCK.
SO
SPI
Serial Data Out Data is transferred out after the falling edge of SCK.
HOLD
SPI and
DUAL
Hold
A high level is required for normal operation. Once the device is selected and a serial sequence
is started, this input may be taken low to pause serial communication without resetting the serial
sequence. The pin must be brought low while SCK is low for immediate use. If SCK is not low,
the HOLD function will not be invoked until the next SCK high to low transition. The device must
remain selected during this sequence. SO is high-Z during the Hold time and SI and SCK are
inputs are ignored. To resume operations, HOLD must be pulled high while the SCK pin is low.
Lowering the HOLD input at any time will take to SO output to High-Z.
VBAT
SPI and
DUAL
Battery Voltage Provides the battery power connection to retain data in battery backed mode.


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